[U-Boot] [PATCH RFC v2] add CONFIG_BOOTCOUNT_LIMIT for MCF5445x

[Wolfgang Denk <wd@denx.de>]

Dear Wolfgang Wegner,

In message <20100423202642.GT20047@leila.ping.de> you wrote:
> This patch adds bootcount for Freescale MCF5445x. Two registers of
> eDMA transfer control descriptors (TCD[1]) are used because these
> are unused by linux kernel (freescale LTIB linux-2.6.25) and were
> tested to keep their contents across resets.
> 
> Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
> ---
> I implemented and tested this bootcount on a custom MCF54455 board.
> According to the data sheet, the internal SRAM is not supposed to be
> useful for data storage across resets. There is no explicit statement
> concerning the TCD registers, but in tests on our board the values
> did always survive reset. TCD[1] is currently unused by the linux
> drivers, so using its registers should be safe as long as no non-
> standard driver is loaded.
> v2: fixed comment

Um... I think this was a misunderstanding. This comment here is lost
in the git repository.

>  arch/m68k/cpu/mcf5445x/cpu.c        |   29 +++++++++++++++++++++++++++++
>  arch/m68k/include/asm/immap_5445x.h |    1 +
>  2 files changed, 30 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/m68k/cpu/mcf5445x/cpu.c b/arch/m68k/cpu/mcf5445x/cpu.c
> index 6238bc0..70007c1 100644
> --- a/arch/m68k/cpu/mcf5445x/cpu.c
> +++ b/arch/m68k/cpu/mcf5445x/cpu.c
> @@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis)
>  	return mcffec_initialize(bis);
>  }
>  #endif
> +
> +#ifdef CONFIG_BOOTCOUNT_LIMIT
> +/*
> + * We use transfer descriptor registers as a persistent storage
> + * across resets. This was tested on a MCF54455.
> + * Neither U-Boot nor the stock LTIB kernel seem to use
> + * TCD[1], so it should be safe at least until application
> + * start.
> + */

It was this comment here that IMHO should be changed as the "until
application start" is misleading.

Best regards,

Wolfgang Denk

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