From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wolfgang Wegner Date: Fri, 23 Apr 2010 22:59:38 +0200 Subject: [U-Boot] [PATCH RFC v3] add CONFIG_BOOTCOUNT_LIMIT for MCF5445x In-Reply-To: <20100423204753.2618E24FA1@gemini.denx.de> References: <1272026324-18566-1-git-send-email-w.wegner@astro-kom.de> <20100423192535.23CF519F60@gemini.denx.de> <20100423194341.GS20047@leila.ping.de> <20100423200332.E99F119F60@gemini.denx.de> <20100423202642.GT20047@leila.ping.de> <20100423204753.2618E24FA1@gemini.denx.de> Message-ID: <20100423205938.GU20047@leila.ping.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patch adds bootcount for Freescale MCF5445x. Two registers of eDMA transfer control descriptors (TCD[1]) are used because these are unused by linux kernel (freescale LTIB linux-2.6.25) and were tested to keep their contents across resets. TCD[1] is currently unused by the linux drivers, so using its registers should be safe as long as no non-standard driver is loaded. Signed-off-by: Wolfgang Wegner --- I implemented and tested this bootcount on a custom MCF54455 board. According to the data sheet, the internal SRAM is not supposed to be useful for data storage across resets. There is no explicit statement concerning the TCD registers, but in tests on our board the values did always survive reset. v2: updated comment v3: moved updated comment to the right place :-) arch/m68k/cpu/mcf5445x/cpu.c | 29 +++++++++++++++++++++++++++++ arch/m68k/include/asm/immap_5445x.h | 1 + 2 files changed, 30 insertions(+), 0 deletions(-) diff --git a/arch/m68k/cpu/mcf5445x/cpu.c b/arch/m68k/cpu/mcf5445x/cpu.c index 6238bc0..70007c1 100644 --- a/arch/m68k/cpu/mcf5445x/cpu.c +++ b/arch/m68k/cpu/mcf5445x/cpu.c @@ -110,3 +110,32 @@ int cpu_eth_init(bd_t *bis) return mcffec_initialize(bis); } #endif + +#ifdef CONFIG_BOOTCOUNT_LIMIT +/* + * We use transfer descriptor registers as a persistent storage + * across resets. This was tested on a MCF54455. + * Neither U-Boot nor the stock LTIB kernel seem to use + * TCD[1], so it should be safe at least until application + * start. + */ +#include + +void bootcount_store(ulong a) +{ + tcd_st *tcd = (tcd_st *)MMAP_TCD; + + __raw_writel(a, &(tcd[1].saddr)); + __raw_writel(BOOTCOUNT_MAGIC, &(tcd[1].daddr)); +} + +ulong bootcount_load(void) +{ + tcd_st *tcd = (tcd_st *)MMAP_TCD; + + if (__raw_readl(&(tcd[1].daddr)) != BOOTCOUNT_MAGIC) + return 0; + else + return __raw_readl(&(tcd[1].saddr)); +} +#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/arch/m68k/include/asm/immap_5445x.h b/arch/m68k/include/asm/immap_5445x.h index 57cf3ec..d6e416a 100644 --- a/arch/m68k/include/asm/immap_5445x.h +++ b/arch/m68k/include/asm/immap_5445x.h @@ -37,6 +37,7 @@ #define MMAP_EDMA 0xFC044000 #define MMAP_INTC0 0xFC048000 #define MMAP_INTC1 0xFC04C000 +#define MMAP_TCD 0xFC045000 #define MMAP_IACK 0xFC054000 #define MMAP_I2C 0xFC058000 #define MMAP_DSPI 0xFC05C000 -- 1.6.3.3