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From: George G. Davis <gdavis@mvista.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
Date: Tue, 1 Jun 2010 23:02:51 -0400	[thread overview]
Message-ID: <20100602030251.GC2485@mvista.com> (raw)
In-Reply-To: <4C051B80.9070401@bumblecow.com>

Hi Tom,

On Tue, Jun 01, 2010 at 09:38:56AM -0500, Tom Rix wrote:
> gdavis at mvista.com wrote:
> >From: George G. Davis <gdavis@mvista.com>
> >
> >The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0"
> >instruction which means "Invalidate Both Caches" when in fact the intent
> >is to clean and invalidate all caches.  So add an "mcr p15, 0, %0, c7,
> >c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate
> >Both Caches" instruction to insure that memory is consistent with any
> >dirty cache lines.
> >
> >Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so
> >that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
> >used.
> >
> >Signed-off-by: George G. Davis <gdavis@mvista.com>
> Applied to arm/master

Er, woops, Dirk's Acked-by was not included.  I reckon I should have
resumitted with that included but to late now.

Thanks!

--
Regards,
George

> Thanks
> Tom

      reply	other threads:[~2010-06-02  3:02 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-05-05 21:09 [U-Boot] [PATCH] ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments George G. Davis
2010-05-10 14:02 ` Dirk Behme
2010-05-11  3:33   ` George G. Davis
2010-05-11  8:56     ` Wolfgang Denk
2010-05-11 13:13       ` George G. Davis
2010-05-11 14:15 ` [U-Boot] [PATCH v2] " gdavis at mvista.com
2010-05-13  9:41   ` Dirk Behme
2010-05-28 15:12     ` George G. Davis
2010-06-01 14:38   ` Tom Rix
2010-06-02  3:02     ` George G. Davis [this message]

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