From mboxrd@z Thu Jan 1 00:00:00 1970 From: George G. Davis Date: Tue, 1 Jun 2010 23:02:51 -0400 Subject: [U-Boot] [PATCH v2] ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments In-Reply-To: <4C051B80.9070401@bumblecow.com> References: <1273093774-10836-1-git-send-email-gdavis@mvista.com> <1273587336-17783-1-git-send-email-gdavis@mvista.com> <4C051B80.9070401@bumblecow.com> Message-ID: <20100602030251.GC2485@mvista.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Tom, On Tue, Jun 01, 2010 at 09:38:56AM -0500, Tom Rix wrote: > gdavis at mvista.com wrote: > >From: George G. Davis > > > >The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0" > >instruction which means "Invalidate Both Caches" when in fact the intent > >is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7, > >c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate > >Both Caches" instruction to insure that memory is consistent with any > >dirty cache lines. > > > >Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so > >that they correctly describe the actual ARM1136 CP15 C7 Cache Operations > >used. > > > >Signed-off-by: George G. Davis > Applied to arm/master Er, woops, Dirk's Acked-by was not included. I reckon I should have resumitted with that included but to late now. Thanks! -- Regards, George > Thanks > Tom