[U-Boot] Need Your Help

[U-Boot] Need Your Help

[Marek Vasut]

Dne P? 9. ?ervence 2010 13:54:28 StephenPaulraj Chinnadurai-ERS,HCLTech 
napsal(a):
> Hello Marek,
> 
> I am using a hardware which has PXA270 controller, I named it as
> hcl_pxa270. This board (hcl_pxa270) is very much similar to mainstone-II
> board which has PXA270 controller.
> 
> I am porting the u-boot for the hcl_pxa270 board.
> 
> I have take open-pxa from the following git
> (http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot/u-boot-pxa.git;a=shortlog;
> h=refs/heads/devel): u-boot-pxa.git -> heads -> devel
> 
> I have modified the following files:
> 
> File Name
> 
> Directory \u-boot-pxa\
> 
> Changes in the file
> 
> See Line Numbers
> 
> hcl_pxa270.h
> 
> include\configs
> 
> Change gpio & memory related configuration values:
> 
> /*
>  * GPIO settings
>  */
> #define CONFIG_SYS_GPSR0_VAL    0x00001000
> #define CONFIG_SYS_GPSR1_VAL    0x000F0200
> #define CONFIG_SYS_GPSR2_VAL    0x10010000
> #define CONFIG_SYS_GPSR3_VAL    0x0003E000
> 
> #define CONFIG_SYS_GPCR0_VAL    0x0BC12008
> #define CONFIG_SYS_GPCR1_VAL    0xFCC0ADB5
> #define CONFIG_SYS_GPCR2_VAL    0x60DE3FFF
> #define CONFIG_SYS_GPCR3_VAL    0x00600144
> 
> #define CONFIG_SYS_GPDR0_VAL    0x0BC13008
> #define CONFIG_SYS_GPDR1_VAL    0xFCCFAAB5
> #define CONFIG_SYS_GPDR2_VAL    0x70DF3FFF
> #define CONFIG_SYS_GPDR3_VAL    0x006BF144
> 
> #define CONFIG_SYS_GAFR0_L_VAL  0x04900000
> #define CONFIG_SYS_GAFR0_U_VAL  0x051AB013
> #define CONFIG_SYS_GAFR1_L_VAL  0x6913599A
> #define CONFIG_SYS_GAFR1_U_VAL  0xAAA5A8AA
> #define CONFIG_SYS_GAFR2_L_VAL  0x0AAAAAAA
> #define CONFIG_SYS_GAFR2_U_VAL  0x1504A176
> #define CONFIG_SYS_GAFR3_L_VAL  0x54001313
> #define CONFIG_SYS_GAFR3_U_VAL  0x00001409
> 
> #define CONFIG_SYS_PSSR_VAL     0x30
> 
> /*
>  * Clock settings
>  */
> #define CONFIG_SYS_CKEN         0x00400200
> #define CONFIG_SYS_CCCR         0x02000290
> 
> /*
>  * Memory settings
>  */
> #define CONFIG_SYS_MSC0_VAL     0x23F2B8F2
> #define CONFIG_SYS_MSC1_VAL     0x0000CCD1
> #define CONFIG_SYS_MSC2_VAL     0x0000B884
> #define CONFIG_SYS_MDCNFG_VAL   0x81000AD1
> #define CONFIG_SYS_MDREFR_VAL   0x2093A01E
> #define CONFIG_SYS_MDMRS_VAL    0x00000000
> #define CONFIG_SYS_FLYCNFG_VAL  0x00010001
> #define CONFIG_SYS_SXCNFG_VAL   0x40044004
> 
> /*
>  * PCMCIA and CF Interfaces
>  */
> #define CONFIG_SYS_MECR_VAL     0x00000001
> #define CONFIG_SYS_MCMEM0_VAL   0x00014307
> #define CONFIG_SYS_MCMEM1_VAL   0x00014307
> #define CONFIG_SYS_MCATT0_VAL   0x0001c787
> #define CONFIG_SYS_MCATT1_VAL   0x0001c787
> #define CONFIG_SYS_MCIO0_VAL    0x0001430f
> #define CONFIG_SYS_MCIO1_VAL    0x0001430f
> 
> 288 to 341
> 
> macro.h
> 
> arch/arm/include/asm/arch-pxa/macro.h
> 
> Added few macros to send the register values through FFUART):
> 
> .macro istbe
> 990:
>         ldr r2, =FFLSR
>         and r2, r2, #0x40
>         beq 990b
> .endm
> 
> .macro initFFUART
>         ldr r2, =FFUART
>         mov r3, #0x0
>         str r3, [r2, #0x0c]
>         str r3, [r2, #0x04]
> 
>         mov r3, #0x80
>         str r3, [r2, #0x0c]
>         mov r3, #0x18
>         str r3, [r2]
>         mov r3, #0x0
>         str r3, [r2, #0x04]
> 
>         mov r3, #0x0
>         str r3, [r2, #0x0c]
>         mov r3, #0x03
>         str r3, [r2, #0x0c]
> 
>         mov r3, #0x7
>         str r3, [r2, #0x08]
>         mov r3, #0x0
>         str r3, [r2, #0x04]
> 
>         mov r3, #0x3
>         str r3, [r2, #0x10]
> 
>         ldr r3, [r2, #0x04]
>         orr r3, r3, #0x40
>         str r3, [r3, #0x04]
> .endm
> 
> .macro printreg
>             ldr r8, =FFUART
>             and r2, #28
> 991:
>             mov r3, r1, lsr r2
>             and r3,r3, #ox0f
>             cmp r3, #0x0000000a
>             addlt r4, r3, #0x30
>             addge r4, r3, #0x37
>             istbe
>             strb r4, [r8]
> 
>             subs r2, r2, #4
>             bne 991b
> 
>             mov r3, r1
>             and r3, r3, #0x0f
>             cmp r3, #0x0000000a
>             addlt r4, r3, #0x30
>             addge r4, r3, #0x37
>             istbe
>             strb r4, [r8]
> 
>             mov r4, #0x0a
>             istbe
>             strb r4, [r8]
> .endm
> 
> 
> 324 to 388
> 
> start.S
> 
> arch\arm\cpu\pxa
> 
You don't need this crap, at all. U-Boot already contains UART init functions, 
take zipit2 board as a reference.

You need to check:
1) Are clock enabled to FFUART (in CKEN, in include/configs/yourboard.h)

2) Is your MFP config correct for FFUART (in GAFR_*, in 
include/configs/yourboard.h)

3) In include/configs/yourboard.h you need this:
/*
 * Serial Console Configuration -- FFUART
 */
#define CONFIG_PXA_SERIAL
#define CONFIG_FFUART                   1
#define CONFIG_BAUDRATE                 115200
#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }

4) In boards/yourboard/yourboard.c, you need:
int board_late_init(void)
{
        setenv("stdout", "serial");
        setenv("stderr", "serial");
        return 0;
}

struct serial_device *default_serial_console (void)
{
        return &serial_ffuart_device;
}

5) Check if you DO NOT have this line in include/configs/yourboard.h:
#CONFIG_LCD
That'd reroute the console output to LCD which you likely don't have or have it 
misconfigured, though even then you'd get some output on the serial.

Anyway, do it as outlined in 1)-4).

Also please keep u-boot mainline list CCed.

Cheers!
> 
> Called the initFFUART & printreg macros after the cpu_init_crit function
> call.
> 
> initFFUART macro will initialize the FFUART.
> 
> printreg macro will send the value stored in the r1 register through
> FFUART.
> 
> 139-140
> 
> 
> I compiled the u-boot using the arm-marvell-linux-gnueabi tool chain.
> 
> I download the u-boot.bin into the NOR flash using JFlashMM.
> 
> After downloading the u-boot.bin into the NOR flash I reset the hardware,
> but I am not getting any output through FFUART.
> 
> I don't know the mistake that I committed in the source.
> 
> I have attached the modified code for your reference.
> 
> I need your help to make the FFUART to work in the hcl_pxa270 board.
> 
> Thanks and Regards
> Stephen Paulraj C
> 
> HCL Technologies Ltd.
> D-12, Sidco Industrial Estate,
> Ambattur, Chennai -58
> Tel: +91 44  42004800 Extn: 2319
> Mob:+91 9962583934
> www.hcl.in<file:///C:\Documents%20and%20Settings\stephenpaulrajc\Applicatio
> n%20Data\Microsoft\Signatures\www.hcl.in>
> [cid:image001.jpg at 01CB1F8B.95654BB0]
> 
> 
> DISCLAIMER:
> ---------------------------------------------------------------------------
> --------------------------------------------
> 
> The contents of this e-mail and any attachment(s) are confidential and
> intended for the named recipient(s) only. It shall not attach any
> liability on the originator or HCL or its affiliates. Any views or
> opinions presented in this email are solely those of the author and may
> not necessarily reflect the opinions of HCL or its affiliates. Any form of
> reproduction, dissemination, copying, disclosure, modification,
> distribution and / or publication of this message without the prior
> written consent of the author of this e-mail is strictly prohibited. If
> you have received this email in error please delete it and notify the
> sender immediately. Before opening any mail and attachments please check
> them for viruses and defect.
> 
> ---------------------------------------------------------------------------
> --------------------------------------------

[U-Boot] need your help

[nice]

hello ,everyone,
Please help.I have a custom board with a mpc8641d processer,
I compiled the u-boot using the configuration of sbc8641d board ,
then I flashed the u-boot.bin into flash, everything seems to
be fine so far. Then I compiled the kernel image and dts file with
the configuration of sbc8641d board, and download the kernel
image and dtb file to the ram. However, when I start the kernel, it
died when uncompressing the kernel image.
The output from serial port is as follows:
U-Boot 2010.12-rc1 (Jan 30 2011 - 09:32:35)
CPU:   8641D, Version: 2.1, (0x80900121)
Core:  E600 Core 0, Version: 2.2, (0x80040202)
Clock Configuration:
       CPU:1200 MHz, MPX:400  MHz
       DDR:200  MHz (400 MT/s data rate), LBC:25   MHz
L1:    D-cache 32 KB enabled
       I-cache 32 KB enabled
L2:    512 KB enabled
Board: Wind River SBC8641D
I2C:   ready
DRAM:      DDR: 512 MiB
FLASH: ERROR: too many flash sectors
32 MiB
*** Warning - bad CRC, using default environment
    PCIE1: disabled
    PCIE2 connected as Root Complex (base addr f8009000)
    PCIE2 on bus 00 - 00
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC2: No support for PHY id ffffffff; assuming generic
eTSEC3: No support for PHY id ffffffff; assuming generic
eTSEC4: No support for PHY id ffffffff; assuming generic
eTSEC1, eTSEC2, eTSEC3, eTSEC4
Hit any key to stop autoboot:  0
=> run nfsboot
Speed: 100, full duplex
Using eTSEC1 device
TFTP from server 192.168.0.2; our IP address is 192.168.0.50
Filename 'uImage'.
Load address: 0x1000000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #######################
done
Bytes transferred = 2109796 (203164 hex)
Speed: 100, full duplex
Using eTSEC1 device
TFTP from server 192.168.0.2; our IP address is 192.168.0.50
Filename 'sbc8641d.dtb'.
Load address: 0x400000
Loading: ##
done
Bytes transferred = 7633 (1dd1 hex)
## Booting kernel from Legacy Image at 01000000 ...
   Image Name:   Linux-2.6.35
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    2109732 Bytes = 2 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 00400000
   Booting using the fdt blob at 0x400000
   Uncompressing Kernel Image ... Machine check in kernel mode.
Caused by (from msr): regs 1fea4818 MSS error. MSSSR0: 00001000
NIP: 1FECB744 XER: 00000000 LR: 1FECB56C REGS: 1fea4818 TRAP: 0200 DAR: 00000000
MSR: 00101030 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
GPR00: 00000016 1FEA4908 1FEA4F48 01000203 000001B4 00000000 0000009E 00000000
GPR08: FFFFFFFF 00003A00 000000C1 00000003 000001FF FFFFF7FF 1FEF695C 00000000
GPR16: FFFFFFFF 000001FF 0000003F FFFFFFFF 00000000 00000000 1FEA73A8 1FEA7D78
GPR24: 007FFEFE 0120315E 00000000 1FEA49E0 1FEA6E78 00000DBF 1FEFEB0C 0000000D
Call backtrace:
001A001A 1FECD4D0 1FEE9E98 1FEE9FC4 1FED9600 1FED99E4 1FEE5AB0
1FEE51C4 1FEE5410 1FEE59EC 1FEE51C4 1FEE53E4 1FEE6AF0 1FEE5AB0
1FEE51C4 1FEE5334 1FEE6F80 1FED0CC8 1FEC957C Machine check in kernel mode.
Caused by (from msr): regs 1fea4568 MSS error. MSSSR0: 00001000
NIP: 1FEE1A58 XER: 20000000 LR: 1FEC98AC REGS: 1fea4568 TRAP: 0200 DAR: 00000000
MSR: 00101030 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
GPR00: 00000001 1FEA4658 1FEA4F48 1FEF446C 00000001 00000004 00000000 00000000
GPR08: 00000000 80000000 00000030 00000000 42044024 FFFFF7FF 1FEF695C 00000000
GPR16: FFFFFFFF 000001FF 0000003F FFFFFFFF 00001032 1FEA4808 00000000 1FEC92C0
GPR24: 1FEC9A20 0120315E 1FEF446C 1FEEE430 1FEA466C 00000000 1FEFEA24 7BE7FF6F
Call backtrace:
1FEE1AA8 1FEC98AC 1FEC9B10 1FEC92C0 001A001A 1FECD4D0 1FEE9E98
1FEE9FC4 1FED9600 1FED99E4 1FEE5AB0 1FEE51C4 1FEE5410 1FEE59EC
1FEE51C4 1FEE53E4 1FEE6AF0 1FEE5AB0 1FEE51C4 1FEE5334 1FEE6F80
1FED0CC8 1FEC957C
machine check

and the enviroment variables are shown as below:

=> printenv
baudrate=115200
bootcmd=setenv bootargs root=/dev/ram rw ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostna0
bootdelay=10
bootfile=uImage
consoledev=ttyS0
dis-wd=mw.b f8100010 0x00; echo -expect:- 00; md.b f8100010 1
dtbaddr=400000
dtbfile=sbc8641d.dtb
en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1
eth1addr=02:E0:0C:00:01:FD
eth2addr=02:E0:0C:00:02:FD
eth3addr=02:E0:0C:00:03:FD
ethact=eTSEC1
ethaddr=02:E0:0C:00:00:01
gatewayip=192.168.0.1
hostname=sbc8641d
ipaddr=192.168.0.50
loadaddr=1000000
loads_echo=1
maxcpus=1
netdev=eth0
netmask=255.255.255.0
nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serveripr
ramboot=setenv bootargs root=/dev/ram rw ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostnar
ramdiskaddr=2000000
ramdiskfile=uRamdisk
rootpath=/opt/eldk/ppc_74xx
serverip=192.168.0.2
stderr=serial
stdin=serial
stdout=serial
because I am a beginner of ppc linux, please give me a hand, much to my appreciation!
Thanks,
     woodyiy

[U-Boot] need your help

[Wolfgang Denk]

Dear nice,

In message <44e92e.98dc.12e2a003bb1.Coremail.huan_t@163.com> you wrote:
>
> Please help.I have a custom board with a mpc8641d processer,
> I compiled the u-boot using the configuration of sbc8641d board ,

You cannot use one configuration for a completely different bord - not
even when you think they are pretty similar. This does not work.

> then I flashed the u-boot.bin into flash, everything seems to
> be fine so far. Then I compiled the kernel image and dts file with

Everything seems to be fine, but only because you close both your eyes
and ignore all the errors.

> U-Boot 2010.12-rc1 (Jan 30 2011 - 09:32:35)

This is old code. Why don't you use current one.

> CPU:   8641D, Version: 2.1, (0x80900121)
> Core:  E600 Core 0, Version: 2.2, (0x80040202)
> Clock Configuration:
>        CPU:1200 MHz, MPX:400  MHz
>        DDR:200  MHz (400 MT/s data rate), LBC:25   MHz
> L1:    D-cache 32 KB enabled
>        I-cache 32 KB enabled
> L2:    512 KB enabled
> Board: Wind River SBC8641D
> I2C:   ready
> DRAM:      DDR: 512 MiB
> FLASH: ERROR: too many flash sectors

Here is a clear error message. Why do you say "everything seems to be
fine" ?

> Net:   eTSEC2: No support for PHY id ffffffff; assuming generic
> eTSEC3: No support for PHY id ffffffff; assuming generic
> eTSEC4: No support for PHY id ffffffff; assuming generic

Here are more errors.

> ## Flattened Device Tree blob at 00400000

This is a pretty low address. Eventyally the device tree blob gets
overwritten during uncompression.

> Call backtrace:
> 001A001A 1FECD4D0 1FEE9E98 1FEE9FC4 1FED9600 1FED99E4 1FEE5AB0
> 1FEE51C4 1FEE5410 1FEE59EC 1FEE51C4 1FEE53E4 1FEE6AF0 1FEE5AB0
> 1FEE51C4 1FEE5334 1FEE6F80 1FED0CC8 1FEC957C Machine check in kernel mode.

Did you attempt to decode the backtrace?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"This isn't brain surgery; it's just television."   - David Letterman

[U-Boot] need your help

[Zang Roy-R61911]

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de] On
> Behalf Of Wolfgang Denk
> Sent: Wednesday, February 16, 2011 1:44 AM
> To: nice
> Cc: u-boot at lists.denx.de
> Subject: Re: [U-Boot] need your help
[snip]
> Here are more errors.
> 
> > ## Flattened Device Tree blob at 00400000
> 
> This is a pretty low address. Eventyally the device tree blob gets
> overwritten during uncompression.

try 0xc00000.
Roy