From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Thu, 12 Aug 2010 14:40:01 +0200 Subject: [U-Boot] Non standard CFI detection tweaks In-Reply-To: <4C63E3E7.30300@dawes.za.net> References: <4C3CC5E5.1040606@dawes.za.net> <201007200958.33622.sr@denx.de> <4C63E3E7.30300@dawes.za.net> Message-ID: <201008121440.01113.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Rogan, On Thursday 12 August 2010 14:07:03 Rogan Dawes wrote: > I found the following configuration snippet for OpenOCD for the DNS323 > at http://wiki.dns323.info/hardware:jtag: > > # driver addr size chip_width bus_width options > flash bank cfi 0xff800000 0x800000 1 2 0 > > It seems that the key here is that the bus_width is set to 2, even > though the chip_width is only 1. Seems not to be so uncommon: 8bit device on a 16bit external bus. > Also, the flash address is still 0xff800000, even though the kernel has > it as 0xf4000000. I guess this is because only a certain number of > address lines are actually connected through to the flash chip, and so > the chip can appear in multiple places? Yes, this could be the case. The flash is most likely "mirrored". > Does that make any more sense? Is it possible that the CFI code in > U-Boot doesn't consider the case when bus_width == 2? As mentioned above, this seems to be a common use-case (even though I don't have such a board at hand right now). Bus-width = 2 (vs. bus-width = 1) shouldn't really matter here. A CPU byte access to the flash address space should translate in one access cycle (8-bit) to the flash device. Sorry, no real idea whats going wrong without being able to test/debug on this platform. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de