From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 26 Aug 2010 13:50:36 +0200 Subject: [U-Boot] [PATCH 10/11] arm/pxa: fix sdram memory layout for vpac270 In-Reply-To: <1282820146-850-2-git-send-email-mikhail.kshevetskiy@gmail.com> References: <1282820146-850-1-git-send-email-mikhail.kshevetskiy@gmail.com> <1282820146-850-2-git-send-email-mikhail.kshevetskiy@gmail.com> Message-ID: <201008261350.36931.marek.vasut@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dne ?t 26. srpna 2010 12:55:45 Mikhail Kshevetskiy napsal(a): > The board have only 128 Mb of memory and only two first memory banks are > used. Also remove unneeded CONFIG_SYS_DRAM_SIZE constant and set default > load address to be in sdram. > > PS: This patch should not go upstream at this point as it specific > to my revision of voipac See my comment on previous patch. Does it work for you? > > Signed-off-by: Mikhail Kshevetskiy > --- > include/configs/vpac270.h | 17 ++++++++++------- > 1 files changed, 10 insertions(+), 7 deletions(-) > > diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h > index c92eb40..b04d1e8 100644 > --- a/include/configs/vpac270.h > +++ b/include/configs/vpac270.h > @@ -166,19 +166,22 @@ > /* > * DRAM Map > */ > -#define CONFIG_NR_DRAM_BANKS 2 /* We have 2 banks of DRAM */ > -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ > -#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ > -#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */ > -#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ > +#define CONFIG_NR_DRAM_BANKS 4 /* We have 2 banks of DRAM */ > +#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ > +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ > +#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ > +#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ > +#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ > +#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ > +#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ > +#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ > > #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ > -#define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */ > > #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ > #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ > > -#define CONFIG_SYS_LOAD_ADDR (0x5c000000) > +#define CONFIG_SYS_LOAD_ADDR 0xa0000000 > > /* > * NOR FLASH