From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Sun, 28 Nov 2010 11:07:20 +0100 Subject: [U-Boot] [PATCH] ppc4xx/POST: Handle cached SDRAM correctly in Denali (440EPx) ECC POST In-Reply-To: <1290782722-9459-1-git-send-email-sr@denx.de> References: <1290782722-9459-1-git-send-email-sr@denx.de> Message-ID: <201011281107.20974.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Friday 26 November 2010 15:45:22 Stefan Roese wrote: > This patch fixes a problem in the Denali (440EPx) SDRAM ECC POST test. > When cache is enabled in the SDRAM area, the values written to SDRAM > need to be flushed from cache to SDRAM using the dcfb instruction. > > Without this patch the POST ECC test failed. Now its working again on > platforms with cache enabled in SDRAM. Applied to u-boot-ppc4xx/master. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de