[U-Boot] building enc28j60 for omap3: SILICON ERRATA

[jacopo mondi <j.mondi@voltaelectronics.com>]

On Wed, 16 Feb 2011 18:31:23 +0100
Reinhard Meyer <u-boot@emk-elektronik.de> wrote:
> 
> Not sure, the driver builds fine with ARM boards.
> Maybe you need to have CONFIG_NET_MULTI set?
> 
> Best Regards,
> Reinhard

I've continued working on enc28j60 in those days, trying to make it
finally work with my beagle.
Stefano confirmed it works 'out of the box' (if I understood
correctly), but I'm experiencing some problems.

The first one is related to an ENC28J60 silicon errata (revision B5,
issue number 1).
It happens that the driver hangs waiting for CLKRDY becoming ready
(enc_clock_wait function).
That test is not relevant, since after a soft reset CLKRDY
bit is not cleared. I can submit a patch, but is a question of simply
waiting for more than 1ms instead of polling on that bit (that's what
the errata says).

Second issue is related to enc identification.
The following code section:

	phid1 = phy_read(enc, PHY_REG_PHID1);
	phid2 = phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;
	if (phid1 != ENC_PHID1_VALUE || phid2 != ENC_PHID2_VALUE) {
		printf("%s: failed to identify PHY. Found
		%04x:%04x\n",			enc->dev->name,
		phid1, phid2);
	 return -1;
	}

fails because phy_read instructions return 0 or random values (0xB0B0
or 0xB000).
Linux driver does not perform such tests, so I've tried removing them.
Anyway all read and write to enc fails.
Could that be related to omap3_spi implementation?

I can confirm that same same board I'm using for test works great
under Linux, so it is not an hardware issue.

Thank you
	jacopo