[U-Boot] [PATCH V2] This patch fix the usage of the "CE don't care"-type NAND chips

[Scott Wood <scottwood@freescale.com>]

On Wed, 23 Feb 2011 12:28:34 +0100
Michael Trimarchi <trimarchi@gandalf.sssup.it> wrote:

> Change since V1:
> 
>    - add a better description

This part does not go in the changelog -- it should be below the --- line.

> Signed-off-by: Michael Trimarchi <michael@evidence.eu.com>
> Cc: Scott Wood <scottwood@freescale.com>
> ---
>  drivers/mtd/nand/atmel_nand.c |   10 ++++++++++
>  1 files changed, 10 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index ab8bbb3..c167f77 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -249,8 +249,18 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd,
>  		if (ctrl & NAND_ALE)
>  			IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
>  
> +		/*
> +		 * atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN
> +		 * If NCE is hooked up to NCS3, we don't need to (and can't)
> +		 * explicitly set the state of the NCE pin. Instead, the
> +		 * controller asserts it automatically as part of a
> +		 * command/data access. Only "CE don't care"-type NAND chips
> +		 * can be used in this manner.
> +		 */

This was meant for the changelog, not the code.  For the code, it seems
reasonably self-explanatory that if you don't have
CONFIG_SYS_NAND_ENABLE_PIN, you don't use it.

If you want to put a short comment in the code about this situation, fine
(though it really belongs in a README that documents
CONFIG_SYS_NAND_ENABLE_PIN instead), but the text above should go in the git
changelog.

-Scott