From: Aaron Williams <Aaron.Williams@caviumnetworks.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC PATCH 1/6] Mips: Move content of arch/mips/cpu to arch/mips/cpu/mips32
Date: Mon, 14 Mar 2011 17:29:19 -0700 [thread overview]
Message-ID: <201103141729.20188.Aaron.Williams@caviumnetworks.com> (raw)
In-Reply-To: <4D7C147A.5060501@gmail.com>
Seperating the SOCs solves most of my problems with the exception of board.c,
but then again, we're rather a special case there due to some of the stuff we
do.
Not counting our SDK we have around 27Kloc for our platform, a large chunk of
that being DDR2/3 memory initialization code. Our SDK currently weighs in at
764Kloc, most of which isn't needed by U-Boot (lots of autogenerated hardware
definition files for all our chips).
-Aaron
On Saturday, March 12, 2011 04:48:58 PM Daniel Schwierzeck wrote:
> Hi Shinya,
>
> On 03/12/2011 03:43 PM, Shinya Kuribayashi wrote:
> > On 3/9/11 10:16 PM, daniel.schwierzeck at googlemail.com wrote:
> >> All current CPUs and SoCs are based on Mips32 arch. The complete
> >
> > Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc
> > and capable of 64-bit, which MIPS32 is 32-bit only architecture.
>
> that was an assumption. I could not find any information about Purple.
> This patch series is a suggestion. Maybe there are better approaches
> like arch/mips/cpu/{mips4k|mips5k|mips24k|...|octeon}.
>
> >> code resides in the global arch/mips/cpu directory. This is not
> >> suitable if other Mips architectures like Mips64 or Octeon should
> >> be supported in the future.
> >
> > Just for the record.
> >
> > Personally, Octeon is sort of a special case. It's based on MIPS64
> > architecture, and definitely a MIPS SoC, but not usual MIPS machine.
> > As Aaron already mentioned before, we have very few files sharable
> > with other MIPS machines even in the Linux kernel case. I think it
> > will take long time the Octeon port gets merged to upstream, regard-
> > less of my opinions, because they have a lot of things need to be
> > resolved prior to Octeon itself.
>
> My original intention was cleaning up the MIPS CPU directory as
> preparation to support new SoCs. I included this patch because Aaron
> asked for this separation some weeks ago but no one answered or commented
> ;) However I posted this series to get some feedback if such a change is
> wanted or acceptable. If so I prepare a new patch series. At least I hope
> the SoC separation is acceptable.
>
> Cheers,
> Daniel
next prev parent reply other threads:[~2011-03-15 0:29 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-09 13:16 [U-Boot] [RFC PATCH 0/6] Mips: Refactoring of CPU and SoC code daniel.schwierzeck at googlemail.com
2011-03-09 13:16 ` [U-Boot] [RFC PATCH 1/6] Mips: Move content of arch/mips/cpu to arch/mips/cpu/mips32 daniel.schwierzeck at googlemail.com
2011-03-12 14:43 ` Shinya Kuribayashi
2011-03-13 0:48 ` Daniel Schwierzeck
2011-03-13 22:44 ` Wolfgang Denk
2011-03-14 12:15 ` Daniel Schwierzeck
2011-03-14 12:41 ` Wolfgang Denk
2011-03-15 0:29 ` Aaron Williams [this message]
2011-03-09 13:16 ` [U-Boot] [RFC PATCH 2/6] Mips: Purple: Adapt u-boot.lds to changed CPU directory layout daniel.schwierzeck at googlemail.com
2011-03-12 14:27 ` Shinya Kuribayashi
2011-03-09 13:16 ` [U-Boot] [RFC PATCH 3/6] Mips: IncaIP: Move all IncaIP specific code to separate subdirectory daniel.schwierzeck at googlemail.com
2011-03-09 13:16 ` [U-Boot] [RFC PATCH 4/6] Mips: Purple: Move all Purple " daniel.schwierzeck at googlemail.com
2011-03-09 13:16 ` [U-Boot] [RFC PATCH 5/6] Mips: Au1x00: Move all Au1x00 " daniel.schwierzeck at googlemail.com
2011-03-09 13:16 ` [U-Boot] [RFC PATCH 6/6] Mips: Update setting of endianess and CPU optimization flags daniel.schwierzeck at googlemail.com
2011-03-12 14:58 ` [U-Boot] [RFC PATCH 0/6] Mips: Refactoring of CPU and SoC code Shinya Kuribayashi
2011-03-12 15:00 ` Shinya Kuribayashi
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