From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wolfgang Denk Date: Fri, 01 Apr 2011 07:35:18 +0200 Subject: [U-Boot] [PATCH] serial: ns16550: fix different reg size access In-Reply-To: References: <1301586774-25447-1-git-send-email-leiwen@marvell.com> <20110331155851.BA1F1F03209@gemini.denx.de> Message-ID: <20110401053518.ADF2AF0320A@gemini.denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Lei Wen, In message you wrote: > > > Can you please explain on what board, and with which tool chain, you > > see any problems? > > I test on Marvell pxa955 (MG1) board, with android 4.4.0 toolchain. > The pxa955's ns16550 register's IER has nine bits. The 8th bit is HSE, which > means the high speed mode. It seems something wrong there, if access the ier > by byte, the 8th bit would be 1 at the beginning, and would be cleared > by the following > set value in the ns16550 driver, which cause problem on that board, > for the baudrate > would be dysfunction. This makes no sense to me. I have never seen any 9 bit registers in any processor I ever encountered in real life. Registers are typically 8, 16, 32 or 64 bit. If your register holds 9 data bits, then it is most probably a 16 or 32 bit wide register. Also, in this case the serial controller is probably not NS16550 compatible, because AFAICT the NS16550 uses only 8 bit wide registers. Further, it is not clear to me why there is a Mervell specific version of the NS16550 driver (board/Marvell/common/ns16550.*). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Time is an illusion perpetrated by the manufacturers of space.