[U-Boot] [PATCH] mmc:dcache: Cache line size aligned internal MMC buffers

Lukasz Majewski
2011-08-24T10:07:44Z

Hi,

On Tue, 23 Aug 2011 23:00:59 -0400
Mike Frysinger <vapier@gentoo.org> wrote:

> On Tuesday, August 23, 2011 18:42:46 Wolfgang Denk wrote:
> > Mike Frysinger wrote:
> > > > Why cannot we define a macro that declares a (sufficiently
> > > > sized) buffer on the stack and provides and a pointer to a
> > > > (correctly aligned) address in this buffer?
> > >
> > > isnt that what i already posted and you NAK-ed ? :)
> > >
> > > DMA_DECLARE_BUFFER(...)
> >
> > I just NAKed this specific implementation.
>
> well, it's hard to come up with a "good" one without knowing the
> parameters to work within ;). i'm not stuck on any particular
> implementation, i just want the helper to be simple to use and hard
> to screw up.
>
> the trouble with doing something like:
> char foo[func_to_do_round(size)];
> is that "size" is not in # of bytes but is number of elements. so
> the point of my (i dont deny) complicated cpp logic was so that the
> internal implementation took on more of the work leaving the user
> (which we all know can easily mess things up) with a very simple
> macro: DMA_DECLARE_BUFFER(<buffer type>, <variable name>, <num
> elements>); -mike

After reading dcache related threads I'd like to sum them up:

1. alloca() -> not acceptable to u-boot mainline by Wolfgang. I agree
that alloca is NOT the way to go.

2. malloc/memalign -> avoidable to use

3. Mike's DMA_DECLARE_BUFFER(<buffer type>, <variable name>,
<size in bytes>)
solution looks OK for me, at least for the stack allocated data (e.g.
ext_csd).
However this proposed implementation has been NAK'ed by Wolfgang.

I'm curious how this macro should look like? Is it only matter of code
reordering or other approach shall be found?

4. get_dcache_line_size() can be simply defined as
#define get_dcache_line_size() CONFIG_SYS_CACHE_LINE_SIZE if we
_really_ want to save a few bytes.
However, I think, that proposed get_dcache_line_size() implementation
( http://patchwork.ozlabs.org/patch/111048/ ) is more programmer
friendly (one don't need to exactly know the dcache line size on a
particular SoC).

--
Best regards,

Lukasz Majewski

Samsung Poland R&D Center
Platform Group