From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Mon, 19 Sep 2011 13:59:43 +0200 Subject: [U-Boot] [PATCH] ppc4xx: Flush dcache after DDR2 autocalibration with caches on In-Reply-To: <1316170498-27839-1-git-send-email-sr@denx.de> References: <1316170498-27839-1-git-send-email-sr@denx.de> Message-ID: <201109191359.43309.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Friday 16 September 2011 12:54:58 Stefan Roese wrote: > Flush the dcache before removing the TLB with caches enabled. > Otherwise this might lead to problems later on, e.g. while booting > Linux (as seen on ICON-440SPe). Applied to u-boot-ppc4xx/master. Best regards, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de