* [U-Boot] U-Boot X86 bootstart
@ 2011-09-30 11:06 Ondra Kupka
2011-09-30 11:09 ` Marek Vasut
2011-09-30 13:02 ` Graeme Russ
0 siblings, 2 replies; 3+ messages in thread
From: Ondra Kupka @ 2011-09-30 11:06 UTC (permalink / raw)
To: u-boot
Hello,
I've been digging a bit in X86 bootstart asm code and found possibly wrong
code, as far as I understand:
In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
/* Turn of cache (this might require a 486-class CPU) */
movl %cr0, %eax
orl $(X86_CR0_NW | X86_CR0_CD), %eax
movl %eax, %cr0
wbinvd
, which perfectly makes sense to me. What doesn't really make sense then is:
/* Turn of cache (this might require a 486-class CPU) */
movl %cr0, %eax
orl $(X86_CR0_NW & X86_CR0_CD), %eax - AND HERE???
movl %eax, %cr0
wbinvd
in start16.S of the same directory.
Is is wrong or not?
Thanks a lot,
Ondrej Kupka
^ permalink raw reply [flat|nested] 3+ messages in thread* [U-Boot] U-Boot X86 bootstart
2011-09-30 11:06 [U-Boot] U-Boot X86 bootstart Ondra Kupka
@ 2011-09-30 11:09 ` Marek Vasut
2011-09-30 13:02 ` Graeme Russ
1 sibling, 0 replies; 3+ messages in thread
From: Marek Vasut @ 2011-09-30 11:09 UTC (permalink / raw)
To: u-boot
On Friday, September 30, 2011 01:06:04 PM Ondra Kupka wrote:
> Hello,
>
> I've been digging a bit in X86 bootstart asm code and found possibly wrong
> code, as far as I understand:
>
> In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
>
> /* Turn of cache (this might require a 486-class CPU) */
> movl %cr0, %eax
> orl $(X86_CR0_NW | X86_CR0_CD), %eax
> movl %eax, %cr0
> wbinvd
>
> , which perfectly makes sense to me. What doesn't really make sense then
> is:
>
> /* Turn of cache (this might require a 486-class CPU) */
> movl %cr0, %eax
> orl $(X86_CR0_NW & X86_CR0_CD), %eax - AND HERE???
> movl %eax, %cr0
> wbinvd
>
> in start16.S of the same directory.
>
> Is is wrong or not?
>
> Thanks a lot,
> Ondrej Kupka
Ccing Graeme, cheers
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] U-Boot X86 bootstart
2011-09-30 11:06 [U-Boot] U-Boot X86 bootstart Ondra Kupka
2011-09-30 11:09 ` Marek Vasut
@ 2011-09-30 13:02 ` Graeme Russ
1 sibling, 0 replies; 3+ messages in thread
From: Graeme Russ @ 2011-09-30 13:02 UTC (permalink / raw)
To: u-boot
Hi Ondrej Kupka
On 30/09/11 21:06, Ondra Kupka wrote:
> Hello,
>
> I've been digging a bit in X86 bootstart asm code and found possibly wrong
> code, as far as I understand:
>
> In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
>
> /* Turn of cache (this might require a 486-class CPU) */
> movl %cr0, %eax
> orl $(X86_CR0_NW | X86_CR0_CD), %eax
> movl %eax, %cr0
> wbinvd
>
> , which perfectly makes sense to me. What doesn't really make sense then is:
>
> /* Turn of cache (this might require a 486-class CPU) */
> movl %cr0, %eax
> orl $(X86_CR0_NW & X86_CR0_CD), %eax - AND HERE???
> movl %eax, %cr0
> wbinvd
>
> in start16.S of the same directory.
>
> Is is wrong or not?
Nice catch :) At least one of them is wrong - I'll sort out a patch (unless
you want to submit a patch yourself that is)
>
> Thanks a lot,
> Ondrej Kupka
Thank you
Regards,
Graeme
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2011-09-30 13:02 UTC | newest]
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2011-09-30 11:06 [U-Boot] U-Boot X86 bootstart Ondra Kupka
2011-09-30 11:09 ` Marek Vasut
2011-09-30 13:02 ` Graeme Russ
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