[U-Boot] [RFC] ARM ISA/cpu/SoC code organization for cache and other functions

[Mike Frysinger <vapier@gentoo.org>]

On Thursday 15 September 2011 17:42:12 Albert ARIBAUD wrote:
> The object files shall be linked in decreasing precedence order, i.e.
> SoC file first, then cpu file, then isa file, then lib last, so that for
> each cache op, the weak symbol mechanism uses the most specific one.

as long as the weak symbols don't cause a pain in terms of making sure the 
right one is selected.  having one depth of weak and strong is fine, but two 
deep sounds like it could be fragile.

i wonder if cascading aliases would work ?  that way each symbol only has one 
weak/strong pair to deal with.  hopefully it's not too confusing ?

>          (isa)   (cpu)     SoC)
> arch/arm
>          /armv5t/
>                  cache-ops.c

__weak void arm_isa_icache_flush(...) { ... }
void icache_flush(...) __attribute__((alias("arm_isa_icache_flush")));

>                  arm926ejs/
>                            cache-ops.c

__weak void arm_cpu_icache_flush(...) { ... }
void arm_isa_icache_flush(...) __attribute__((alias("arm_cpu_icache_flush")));

>                            orion5x/
>                                    cache-ops.c

void arm_soc_icache_flush(...) { ... }
void arm_cpu_icache_flush(...) __attribute__((alias("arm_soc_icache_flush")));
-mike
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