From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ira W. Snyder Date: Thu, 10 Nov 2011 11:59:35 -0800 Subject: [U-Boot] Is CCSRBAR relocation broken on P2020? In-Reply-To: <4EBC2AC0.9050208@freescale.com> References: <20111110165447.GA1801@ovro.caltech.edu> <4EBC0609.2030709@freescale.com> <20111110173356.GC1801@ovro.caltech.edu> <4EBC0E40.3050403@freescale.com> <20111110194634.GE1801@ovro.caltech.edu> <4EBC2AC0.9050208@freescale.com> Message-ID: <20111110195935.GF1801@ovro.caltech.edu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, Nov 10, 2011 at 01:49:20PM -0600, Timur Tabi wrote: > Ira W. Snyder wrote: > > > I boot using the on-chip ROM, loading U-Boot from SD card to DDR. > > The on-chip creates a 4GB TLB, which breaks the CCSR code. My five-patch patchset fixes this. > Yep, that worked. I applied the patchset starting with "powerpc/85xx: fix definition of MAS register macros", and it now works, with relocation. I'll post a v3 of my board port shortly. The v2 removed relocation, which didn't work against the top of tree code. Thanks everyone! Ira > -- > Timur Tabi > Linux kernel developer at Freescale > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot