[U-Boot] [PATCH v4] arm:exynos4:samsung:nuri Support for NURI target.

[Lukasz Majewski <l.majewski@samsung.com>]

Hello Marek,

Thanks for your feedback,

> > +	ldr	r0, =0x10150000
> > +	mov	r1, #0x0
> > +	str	r1, [r0]
> > +	mov	r1, #0xff
> > +	str	r1, [r0, #0x0804]
> > +	str	r1, [r0, #0x0810]
> > +	str	r1, [r0, #0x081C]
> > +	str	r1, [r0, #0x0828]
> > +
> > +	mov	pc, lr  
> 
> Why not use arch_cpu_init for all this. Or even better, put the uart
> init into uart driver etc .. ?

Hmm... good point.

This low level code is common for some Samsung boards (Origen, Nuri,
Universal_C210) and shall be put to ./board/samsung/lowlevel_init/
directory and be included to all those boards.

Another question is switching to FDT framework, which we will face
sooner than later. 

Those boards are also good candidates for FDT, but I don't have an idea
when would be a good moment for this switch.


> > +int dram_init(void)
> > +{
> > +	gd->ram_size = \
> > +		get_ram_size((long *)PHYS_SDRAM_1,
> > PHYS_SDRAM_1_SIZE) +
> > +		get_ram_size((long *)PHYS_SDRAM_2,
> > PHYS_SDRAM_2_SIZE) +
> > +		get_ram_size((long *)PHYS_SDRAM_3,
> > PHYS_SDRAM_3_SIZE) +
> > +		get_ram_size((long *)PHYS_SDRAM_4,
> > PHYS_SDRAM_4_SIZE); +
> > +	return 0;
> > +}
> > +
> > +void dram_init_banksize(void)
> > +{
> > +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> > +	gd->bd->bi_dram[0].size = get_ram_size((long
> > *)PHYS_SDRAM_1, \
> > +
> > PHYS_SDRAM_1_SIZE); +
> > +	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> > +	gd->bd->bi_dram[1].size = get_ram_size((long
> > *)PHYS_SDRAM_2, \
> > +
> > PHYS_SDRAM_2_SIZE); +
> > +	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
> > +	gd->bd->bi_dram[2].size = get_ram_size((long
> > *)PHYS_SDRAM_3, \
> > +
> > PHYS_SDRAM_3_SIZE); +
> > +	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
> > +	gd->bd->bi_dram[3].size = get_ram_size((long
> > *)PHYS_SDRAM_4, \
> > +
> > PHYS_SDRAM_4_SIZE); +}
> 
> The board has discontiguous memory ?

Why do you think so? The board has four banks starting from 0x40000000.

Those definitely form a continuous memory.
 

-- 
Best regards,

Lukasz Majewski

Samsung Poland R&D Center
Platform Group