[U-Boot] [PATCH 0/9] MX5x USB support

[U-Boot] [PATCH 0/9] MX5x USB support

[Marek Vasut]

This patchset adds the USB support for MX5x. Most of the code is based on work
of Wolfgang Grandegger with modifications done by various other authors. I also
included version of ULPI support code cleaned up by Igor Grinberg.

NOTE: I'd really love to get this code into .12 release. Remy, Wolfgang, do you
think it'd be possible? I'd really help adoption of the MX5x USB code greatly as
well as cleanup of the ULPI code (which is sadly in a bad shape).

Jana Rapava (1):
  USB: Add generic ULPI layer and a viewport

Marek Vasut (4):
  USB: MX5: Abstract out mx51 USB pixmux configuration
  USB: MX5: Add MX5 usb post-init callback
  USB: EHCI: Allow EHCI post-powerup configuration in board files
  USB: efikamx: Enable USB on EfikaMX and EfikaSB

Wolfgang Grandegger (4):
  USB: MX5: add helper functions to enable USB clocks
  USB: MX5: add generic USB EHCI support for mx51 and mx53
  USB: mx53loco: add end enable USB host support on port 1
  USB: mx51evk: add end enable USB host support on port 1

 Makefile                                 |    1 +
 arch/arm/cpu/armv7/mx5/clock.c           |   72 +++++++
 arch/arm/include/asm/arch-mx5/clock.h    |    5 +
 arch/arm/include/asm/arch-mx5/crm_regs.h |    3 +
 board/efikamx/Makefile                   |    4 +
 board/efikamx/efikamx-usb.c              |  210 +++++++++++++++++++++
 board/efikamx/efikamx.c                  |   15 ++
 board/freescale/mx51evk/mx51evk.c        |   62 ++++++
 board/freescale/mx53loco/mx53loco.c      |   10 +
 drivers/usb/host/Makefile                |    1 +
 drivers/usb/host/ehci-hcd.c              |   12 +-
 drivers/usb/host/ehci-mx5.c              |  255 +++++++++++++++++++++++++
 drivers/usb/ulpi/Makefile                |   44 +++++
 drivers/usb/ulpi/ulpi-viewport.c         |  118 ++++++++++++
 drivers/usb/ulpi/ulpi.c                  |  227 +++++++++++++++++++++++
 include/configs/efikamx.h                |   47 ++++-
 include/configs/mx51evk.h                |   13 ++
 include/configs/mx53loco.h               |   13 ++
 include/usb/ehci-fsl.h                   |   16 ++
 include/usb/ulpi.h                       |  298 ++++++++++++++++++++++++++++++
 20 files changed, 1418 insertions(+), 8 deletions(-)
 create mode 100644 board/efikamx/efikamx-usb.c
 create mode 100644 drivers/usb/host/ehci-mx5.c
 create mode 100644 drivers/usb/ulpi/Makefile
 create mode 100644 drivers/usb/ulpi/ulpi-viewport.c
 create mode 100644 drivers/usb/ulpi/ulpi.c
 create mode 100644 include/usb/ulpi.h

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Jana Rapava <fermata7@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
-- 
1.7.7.1

[U-Boot] [PATCH 1/9] USB: MX5: add helper functions to enable USB clocks

[Marek Vasut]

From: Wolfgang Grandegger <wg@denx.de>

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>

V2: Fix spacing in crm_regs.h
---
 arch/arm/cpu/armv7/mx5/clock.c           |   72 ++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx5/clock.h    |    5 ++
 arch/arm/include/asm/arch-mx5/crm_regs.h |    3 +
 3 files changed, 80 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 0769a64..c8dad17 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -50,6 +50,78 @@ struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = {
 
 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
 
+void set_usboh3_clk(void)
+{
+	unsigned int reg;
+
+	reg = readl(&mxc_ccm->cscmr1) &
+		 ~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK;
+	reg |= 1 << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET;
+	writel(reg, &mxc_ccm->cscmr1);
+
+	reg = readl(&mxc_ccm->cscdr1);
+	reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK;
+	reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK;
+	reg |= 4 << MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET;
+	reg |= 1 << MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET;
+
+	writel(reg, &mxc_ccm->cscdr1);
+}
+
+void enable_usboh3_clk(unsigned char enable)
+{
+	unsigned int reg;
+
+	reg = readl(&mxc_ccm->CCGR2);
+	if (enable)
+		reg |= 1 << MXC_CCM_CCGR2_CG14_OFFSET;
+	else
+		reg &= ~(1 << MXC_CCM_CCGR2_CG14_OFFSET);
+	writel(reg, &mxc_ccm->CCGR2);
+}
+
+void set_usb_phy1_clk(void)
+{
+	unsigned int reg;
+
+	reg = readl(&mxc_ccm->cscmr1);
+	reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL;
+	writel(reg, &mxc_ccm->cscmr1);
+}
+
+void enable_usb_phy1_clk(unsigned char enable)
+{
+	unsigned int reg;
+
+	reg = readl(&mxc_ccm->CCGR4);
+	if (enable)
+		reg |= 1 << MXC_CCM_CCGR4_CG5_OFFSET;
+	else
+		reg &= ~(1 << MXC_CCM_CCGR4_CG5_OFFSET);
+	writel(reg, &mxc_ccm->CCGR4);
+}
+
+void set_usb_phy2_clk(void)
+{
+	unsigned int reg;
+
+	reg = readl(&mxc_ccm->cscmr1);
+	reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL;
+	writel(reg, &mxc_ccm->cscmr1);
+}
+
+void enable_usb_phy2_clk(unsigned char enable)
+{
+	unsigned int reg;
+
+	reg = readl(&mxc_ccm->CCGR4);
+	if (enable)
+		reg |= 1 << MXC_CCM_CCGR4_CG6_OFFSET;
+	else
+		reg &= ~(1 << MXC_CCM_CCGR4_CG6_OFFSET);
+	writel(reg, &mxc_ccm->CCGR4);
+}
+
 /*
  * Calculate the frequency of PLLn.
  */
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h
index 1f8a537..ea972a3 100644
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -40,4 +40,9 @@ u32 imx_get_uartclk(void);
 u32 imx_get_fecclk(void);
 unsigned int mxc_get_clock(enum mxc_clock clk);
 
+void set_usb_phy2_clk(void);
+void enable_usb_phy2_clk(unsigned char enable);
+void set_usboh3_clk(void);
+void enable_usboh3_clk(unsigned char enable);
+
 #endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h
index fcc0e36..bdeafbc 100644
--- a/arch/arm/include/asm/arch-mx5/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx5/crm_regs.h
@@ -195,7 +195,10 @@ struct mxc_ccm_reg {
 /* Define the bits in register CCGRx */
 #define MXC_CCM_CCGR_CG_MASK				0x3
 
+#define MXC_CCM_CCGR4_CG5_OFFSET			10
+#define MXC_CCM_CCGR4_CG6_OFFSET			12
 #define MXC_CCM_CCGR5_CG5_OFFSET			10
+#define MXC_CCM_CCGR2_CG14_OFFSET			28
 
 /* Define the bits in register CLPCR */
 #define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS                 (0x1 << 18)
-- 
1.7.7.1

[U-Boot] [PATCH 2/9] USB: MX5: add generic USB EHCI support for mx51 and mx53

[Marek Vasut]

From: Wolfgang Grandegger <wg@denx.de>

It's derived from ehci-mxc and uses the header files of the
ehci-fsl interface. The callback board_ehci_hcd_init() has
been introduced to allow for board-specific setup when USB
is started.

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Remy Bohmer <linux@bohmer.net>
---
 drivers/usb/host/Makefile   |    1 +
 drivers/usb/host/ehci-mx5.c |  174 +++++++++++++++++++++++++++++++++++++++++++
 include/usb/ehci-fsl.h      |   10 +++
 3 files changed, 185 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/host/ehci-mx5.c

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 09abb75..77e217f 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
 endif
 COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
 COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
+COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
 COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
 COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
 COBJS-$(CONFIG_USB_EHCI_KIRKWOOD) += ehci-kirkwood.o
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
new file mode 100644
index 0000000..4c961d3
--- /dev/null
+++ b/drivers/usb/host/ehci-mx5.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <errno.h>
+#include <linux/compiler.h>
+#include <usb/ehci-fsl.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/mx5x_pins.h>
+
+#include "ehci.h"
+#include "ehci-core.h"
+
+#define MX5_USBOTHER_REGS_OFFSET 0x800
+
+
+#define MXC_OTG_OFFSET		0
+#define MXC_H1_OFFSET		0x200
+#define MXC_H2_OFFSET		0x400
+
+#define MXC_USBCTRL_OFFSET		0
+#define MXC_USB_PHY_CTR_FUNC_OFFSET	0x8
+#define MXC_USB_PHY_CTR_FUNC2_OFFSET	0xc
+#define MXC_USB_CTRL_1_OFFSET		0x10
+#define MXC_USBH2CTRL_OFFSET		0x14
+
+/* USB_CTRL */
+#define MXC_OTG_UCTRL_OWIE_BIT	(1 << 27) /* OTG wakeup intr enable */
+#define MXC_OTG_UCTRL_OPM_BIT	(1 << 24) /* OTG power mask */
+#define MXC_H1_UCTRL_H1UIE_BIT	(1 << 12) /* Host1 ULPI interrupt enable */
+#define MXC_H1_UCTRL_H1WIE_BIT	(1 << 11) /* HOST1 wakeup intr enable */
+#define MXC_H1_UCTRL_H1PM_BIT	(1 << 8) /* HOST1 power mask */
+
+/* USB_PHY_CTRL_FUNC */
+#define MXC_OTG_PHYCTRL_OC_DIS_BIT (1 << 8) /* OTG Disable Overcurrent Event */
+#define MXC_H1_OC_DIS_BIT	(1 << 5) /* UH1 Disable Overcurrent Event */
+
+/* USBH2CTRL */
+#define MXC_H2_UCTRL_H2UIE_BIT	(1 << 8)
+#define MXC_H2_UCTRL_H2WIE_BIT	(1 << 7)
+#define MXC_H2_UCTRL_H2PM_BIT	(1 << 4)
+
+/* USB_CTRL_1 */
+#define MXC_USB_CTRL_UH1_EXT_CLK_EN		(1 << 25)
+
+int mxc_set_usbcontrol(int port, unsigned int flags)
+{
+	unsigned int v;
+	void __iomem *usb_base = (void __iomem *)OTG_BASE_ADDR;
+	void __iomem *usbother_base;
+	int ret = 0;
+
+	usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
+
+	switch (port) {
+	case 0:	/* OTG port */
+		if (flags & MXC_EHCI_INTERNAL_PHY) {
+			v = __raw_readl(usbother_base +
+					MXC_USB_PHY_CTR_FUNC_OFFSET);
+			if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+				/* OC/USBPWR is not used */
+				v |= MXC_OTG_PHYCTRL_OC_DIS_BIT;
+			else
+				/* OC/USBPWR is used */
+				v &= ~MXC_OTG_PHYCTRL_OC_DIS_BIT;
+			__raw_writel(v, usbother_base +
+					MXC_USB_PHY_CTR_FUNC_OFFSET);
+
+			v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);
+			if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+				v |= MXC_OTG_UCTRL_OPM_BIT;
+			else
+				v &= ~MXC_OTG_UCTRL_OPM_BIT;
+			__raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);
+		}
+		break;
+	case 1:	/* Host 1 Host ULPI */
+#ifdef CONFIG_MX51
+		/* The clock for the USBH1 ULPI port will come externally
+		   from the PHY. */
+		v = __raw_readl(usbother_base + MXC_USB_CTRL_1_OFFSET);
+		__raw_writel(v | MXC_USB_CTRL_UH1_EXT_CLK_EN, usbother_base +
+				MXC_USB_CTRL_1_OFFSET);
+#endif
+
+		v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);
+		if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+			v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used */
+		else
+			v |= MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used */
+		__raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);
+
+		v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);
+		if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+			v &= ~MXC_H1_OC_DIS_BIT; /* OC is used */
+		else
+			v |= MXC_H1_OC_DIS_BIT; /* OC is not used */
+		__raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);
+
+		break;
+	case 2: /* Host 2 ULPI */
+		v = __raw_readl(usbother_base + MXC_USBH2CTRL_OFFSET);
+		if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+			v &= ~MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used */
+		else
+			v |= MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used */
+
+		__raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET);
+		break;
+	}
+
+	return ret;
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+#ifdef CONFIG_MX53
+	struct clkctl *sc_regs = (struct clkctl *)CCM_BASE_ADDR;
+	u32 reg;
+
+	reg = __raw_readl(&sc_regs->cscmr1) & ~(1 << 26);
+	/* derive USB PHY clock multiplexer from PLL3 */
+	reg |= 1 << 26;
+	__raw_writel(reg, &sc_regs->cscmr1);
+#endif
+
+	set_usboh3_clk();
+	enable_usboh3_clk(1);
+	set_usb_phy2_clk();
+	enable_usb_phy2_clk(1);
+	mdelay(1);
+
+	/* do board specific initialization */
+	board_ehci_hcd_init(CONFIG_MXC_USB_PORT);
+
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(0x200 * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t)hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+
+	__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
+	setbits_le32(&ehci->portsc, USB_EN);
+
+	mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS);
+
+	mdelay(10);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
+
+
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index f50a8f2..4ce0ab3 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -243,4 +243,14 @@ struct usb_ehci {
 	u8	res14[0xafc];
 };
 
+/*
+ * For MXC SOCs
+ */
+#define MXC_EHCI_POWER_PINS_ENABLED	(1 << 5)
+#define MXC_EHCI_TTL_ENABLED		(1 << 6)
+#define MXC_EHCI_INTERNAL_PHY		(1 << 7)
+
+/* Board-specific initialization */
+int board_ehci_hcd_init(int port);
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.7.1

[U-Boot] [PATCH 3/9] USB: MX5: Abstract out mx51 USB pixmux configuration

[Marek Vasut]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
---
 drivers/usb/host/ehci-mx5.c |   71 +++++++++++++++++++++++++++++++++++++++++++
 include/usb/ehci-fsl.h      |    6 ++++
 2 files changed, 77 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 4c961d3..7b88137 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -58,6 +58,77 @@
 /* USB_CTRL_1 */
 #define MXC_USB_CTRL_UH1_EXT_CLK_EN		(1 << 25)
 
+/* USB pin configuration */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+
+#ifdef CONFIG_MX51
+/*
+ * Configure the MX51 USB H1 IOMUX
+ */
+void setup_iomux_usb_h1(void)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+}
+
+/*
+ * Configure the MX51 USB H2 IOMUX
+ */
+void setup_iomux_usb_h2(void)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+}
+#endif
+
 int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 4ce0ab3..2869302 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -253,4 +253,10 @@ struct usb_ehci {
 /* Board-specific initialization */
 int board_ehci_hcd_init(int port);
 
+/* CPU-specific abstracted-out IOMUX init */
+#ifdef CONFIG_MX51
+void setup_iomux_usb_h1(void);
+void setup_iomux_usb_h2(void);
+#endif
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.7.1

[U-Boot] [PATCH 4/9] USB: MX5: Add MX5 usb post-init callback

[Marek Vasut]

This is useful for USB Transceivers init etc.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
---
 drivers/usb/host/ehci-mx5.c |   14 ++++++++++++--
 1 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 7b88137..68a673e 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -22,6 +22,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
 
 #include "ehci.h"
 #include "ehci-core.h"
@@ -198,6 +199,13 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
 	return ret;
 }
 
+void __board_ehci_hcd_postinit(struct usb_ehci *ehci, int port)
+{
+}
+
+void board_ehci_hcd_postinit(struct usb_ehci *ehci, int port)
+	__attribute((weak, alias("__board_ehci_hcd_postinit")));
+
 int ehci_hcd_init(void)
 {
 	struct usb_ehci *ehci;
@@ -217,7 +225,7 @@ int ehci_hcd_init(void)
 	enable_usb_phy2_clk(1);
 	mdelay(1);
 
-	/* do board specific initialization */
+	/* Do board specific initialization */
 	board_ehci_hcd_init(CONFIG_MXC_USB_PORT);
 
 	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
@@ -231,9 +239,11 @@ int ehci_hcd_init(void)
 	setbits_le32(&ehci->portsc, USB_EN);
 
 	mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS);
-
 	mdelay(10);
 
+	/* Do board specific post-initialization */
+	board_ehci_hcd_postinit(ehci, CONFIG_MXC_USB_PORT);
+
 	return 0;
 }
 
-- 
1.7.7.1

[U-Boot] [PATCH 5/9] USB: mx53loco: add end enable USB host support on port 1

[Marek Vasut]

From: Wolfgang Grandegger <wg@denx.de>

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
---
 board/freescale/mx53loco/mx53loco.c |   10 ++++++++++
 include/configs/mx53loco.h          |   13 +++++++++++++
 2 files changed, 23 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index b4c7f33..a4cd14e 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -78,6 +78,16 @@ static void setup_iomux_uart(void)
 				PAD_CTL_ODE_OPENDRAIN_ENABLE);
 }
 
+#ifdef CONFIG_USB_EHCI_MX5
+void board_ehci_hcd_init(int port)
+{
+	/* request VBUS power enable pin, GPIO[8}, gpio7 */
+	mxc_request_iomux(MX53_PIN_ATA_DA_2, IOMUX_CONFIG_ALT1);
+	gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 0);
+	gpio_set_value(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 1);
+}
+#endif
+
 static void setup_iomux_fec(void)
 {
 	/*FEC_MDIO*/
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index d699010..9ce43d7 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -72,6 +72,19 @@
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS	0
+
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX		1
-- 
1.7.7.1

[U-Boot] [PATCH 6/9] USB: mx51evk: add end enable USB host support on port 1

[Marek Vasut]

From: Wolfgang Grandegger <wg@denx.de>

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
---
 board/freescale/mx51evk/mx51evk.c |   62 +++++++++++++++++++++++++++++++++++++
 include/configs/mx51evk.h         |   13 ++++++++
 2 files changed, 75 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 37e6e4d..991bae2 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -35,6 +35,7 @@
 #include <pmic.h>
 #include <fsl_pmic.h>
 #include <mc13892.h>
+#include <usb/ehci-fsl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -172,6 +173,64 @@ static void setup_iomux_spi(void)
 }
 #endif
 
+#ifdef CONFIG_USB_EHCI_MX5
+#define MX51EVK_USBH1_HUB_RST	IOMUX_TO_GPIO(MX51_PIN_GPIO1_7) /* GPIO1_7 */
+#define MX51EVK_USBH1_STP	IOMUX_TO_GPIO(MX51_PIN_USBH1_STP) /* GPIO1_27 */
+#define MX51EVK_USB_CLK_EN_B	IOMUX_TO_GPIO(MX51_PIN_EIM_D18) /* GPIO2_1 */
+#define MX51EVK_USB_PHY_RESET	IOMUX_TO_GPIO(MX51_PIN_EIM_D21) /* GPIO2_5 */
+
+#define USBH1_PAD	(PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |		\
+			 PAD_CTL_100K_PU | PAD_CTL_PUE_PULL |		\
+			 PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE)
+#define GPIO_PAD	(PAD_CTL_DRV_HIGH | PAD_CTL_PKE_ENABLE |	\
+			 PAD_CTL_SRE_FAST)
+#define NO_PAD		(1 << 16)
+
+static void setup_usb_h1(void)
+{
+	setup_iomux_usb_h1();
+
+	/* GPIO_1_7 for USBH1 hub reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_7, NO_PAD);
+
+	/* GPIO_2_1 */
+	mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D17, GPIO_PAD);
+
+	/* GPIO_2_5 for USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D21, GPIO_PAD);
+}
+
+void board_ehci_hcd_init(int port)
+{
+	/* Set USBH1_STP to GPIO and toggle it */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USBH1_PAD);
+
+	gpio_direction_output(MX51EVK_USBH1_STP, 0);
+	gpio_direction_output(MX51EVK_USB_PHY_RESET, 0);
+	mdelay(10);
+	gpio_set_value(MX51EVK_USBH1_STP, 1);
+
+	/* Set back USBH1_STP to be function */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USBH1_PAD);
+
+	/* De-assert USB PHY RESETB */
+	gpio_set_value(MX51EVK_USB_PHY_RESET, 1);
+
+	/* Drive USB_CLK_EN_B line low */
+	gpio_direction_output(MX51EVK_USB_CLK_EN_B, 0);
+
+	/* Reset USB hub */
+	gpio_direction_output(MX51EVK_USBH1_HUB_RST, 0);
+	mdelay(2);
+	gpio_set_value(MX51EVK_USBH1_HUB_RST, 1);
+}
+#endif
+
 static void power_init(void)
 {
 	unsigned int val;
@@ -391,6 +450,9 @@ int board_early_init_f(void)
 {
 	setup_iomux_uart();
 	setup_iomux_fec();
+#ifdef CONFIG_USB_EHCI_MX5
+	setup_usb_h1();
+#endif
 
 	return 0;
 }
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 7c7544f..18f1ebd 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -110,6 +110,19 @@
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_MXC_USB_PORTSC	PORT_PTS_ULPI
+#define CONFIG_MXC_USB_FLAGS	MXC_EHCI_POWER_PINS_ENABLED
+
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX		1
-- 
1.7.7.1

[U-Boot] [PATCH 7/9] USB: EHCI: Allow EHCI post-powerup configuration in board files

[Marek Vasut]

This patch allows USB to work on some hosts, which need additional frobing after
the host was powered up via regular USB powerup sequence.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
---
 drivers/usb/host/ehci-hcd.c |   12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index b4c9db8..8bb3ff1 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -205,6 +205,14 @@ static inline void ehci_invalidate_dcache(struct QH *qh)
 }
 #endif /* CONFIG_EHCI_DCACHE */
 
+void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
+{
+	mdelay(50);
+}
+
+void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
+	__attribute__((weak, alias("__ehci_powerup_fixup")));
+
 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 {
 	uint32_t result;
@@ -713,8 +721,8 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 				 * usb 2.0 specification say 50 ms resets on
 				 * root
 				 */
-				wait_ms(50);
-				/* terminate the reset */
+				ehci_powerup_fixup(status_reg, &reg);
+
 				ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 				/*
 				 * A host controller must terminate the reset
-- 
1.7.7.1

[U-Boot] [PATCH 8/9] USB: Add generic ULPI layer and a viewport

[Marek Vasut]

From: Jana Rapava <fermata7@gmail.com>

Add partial ULPI specification implementation that should be enough to
interface the ULPI PHYs in the boot loader context.
Add a viewport implementation for Chipidea/ARC based controllers.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Simon Glass <sjg@chromium.org>
---
 Makefile                         |    1 +
 drivers/usb/ulpi/Makefile        |   44 ++++++
 drivers/usb/ulpi/ulpi-viewport.c |  118 +++++++++++++++
 drivers/usb/ulpi/ulpi.c          |  227 +++++++++++++++++++++++++++++
 include/usb/ulpi.h               |  298 ++++++++++++++++++++++++++++++++++++++
 5 files changed, 688 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/ulpi/Makefile
 create mode 100644 drivers/usb/ulpi/ulpi-viewport.c
 create mode 100644 drivers/usb/ulpi/ulpi.c
 create mode 100644 include/usb/ulpi.h

diff --git a/Makefile b/Makefile
index d84b350..ab7a269 100644
--- a/Makefile
+++ b/Makefile
@@ -283,6 +283,7 @@ LIBS += drivers/usb/gadget/libusb_gadget.o
 LIBS += drivers/usb/host/libusb_host.o
 LIBS += drivers/usb/musb/libusb_musb.o
 LIBS += drivers/usb/phy/libusb_phy.o
+LIBS += drivers/usb/ulpi/libusb_ulpi.o
 LIBS += drivers/video/libvideo.o
 LIBS += drivers/watchdog/libwatchdog.o
 LIBS += common/libcommon.o
diff --git a/drivers/usb/ulpi/Makefile b/drivers/usb/ulpi/Makefile
new file mode 100644
index 0000000..d43b229
--- /dev/null
+++ b/drivers/usb/ulpi/Makefile
@@ -0,0 +1,44 @@
+#
+# Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	:= $(obj)libusb_ulpi.o
+
+COBJS-$(CONFIG_USB_ULPI)		+= ulpi.o
+COBJS-$(CONFIG_USB_ULPI_VIEWPORT)	+= ulpi-viewport.o
+
+COBJS	:= $(COBJS-y)
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+all:	$(LIB)
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
new file mode 100644
index 0000000..fa2e004
--- /dev/null
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
+ *
+ * Authors: Jana Rapava <fermata7@gmail.com>
+ *	    Igor Grinberg <grinberg@compulab.co.il>
+ *
+ * Based on:
+ * linux/drivers/usb/otg/ulpi_viewport.c
+ *
+ * Original Copyright follow:
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <usb/ulpi.h>
+
+/* ULPI viewport control bits */
+#define ULPI_SS		(1 << 27)
+#define ULPI_RWCTRL	(1 << 29)
+#define ULPI_RWRUN	(1 << 30)
+#define ULPI_WU		(1 << 31)
+
+/*
+ * Wait for the ULPI request to complete
+ *
+ * @ulpi_viewport	- the address of the viewport
+ * @mask		- expected value to wait for
+ *
+ * returns 0 on mask match, ULPI_ERROR on time out.
+ */
+static int ulpi_wait(u32 ulpi_viewport, u32 mask)
+{
+	int timeout = CONFIG_USB_ULPI_TIMEOUT;
+
+	/* Wait for the bits in mask to become zero. */
+	while (--timeout) {
+		if ((readl(ulpi_viewport) & mask) == 0)
+			return 0;
+
+		udelay(1);
+	}
+
+	return ULPI_ERROR;
+}
+
+/*
+ * Wake the ULPI PHY up for communication
+ *
+ * returns 0 on success.
+ */
+static int ulpi_wakeup(u32 ulpi_viewport)
+{
+	int err;
+
+	if (readl(ulpi_viewport) & ULPI_SS)
+		return 0; /* already awake */
+
+	writel(ULPI_WU, ulpi_viewport);
+
+	err = ulpi_wait(ulpi_viewport, ULPI_WU);
+	if (err)
+		printf("ULPI wakeup timed out\n");
+
+	return err;
+}
+
+/*
+ * Issue a ULPI read/write request
+ *
+ * @value - the ULPI request
+ */
+static int ulpi_request(u32 ulpi_viewport, u32 value)
+{
+	int err;
+
+	err = ulpi_wakeup(ulpi_viewport);
+	if (err)
+		return err;
+
+	writel(value, ulpi_viewport);
+
+	err = ulpi_wait(ulpi_viewport, ULPI_RWRUN);
+	if (err)
+		printf("ULPI request timed out\n");
+
+	return err;
+}
+
+u32 ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
+{
+	u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
+
+	return ulpi_request(ulpi_viewport, val);
+}
+
+u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
+{
+	u32 err;
+	u32 val = ULPI_RWRUN | ((u32)reg << 16);
+
+	err = ulpi_request(ulpi_viewport, val);
+	if (err)
+		return err;
+
+	return (readl(ulpi_viewport) >> 8) & 0xff;
+}
diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c
new file mode 100644
index 0000000..805e29d
--- /dev/null
+++ b/drivers/usb/ulpi/ulpi.c
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
+ *
+ * Authors: Jana Rapava <fermata7@gmail.com>
+ *	    Igor Grinberg <grinberg@compulab.co.il>
+ *
+ * Based on:
+ * linux/drivers/usb/otg/ulpi.c
+ * Generic ULPI USB transceiver support
+ *
+ * Original Copyright follow:
+ * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * Based on sources from
+ *
+ *   Sascha Hauer <s.hauer@pengutronix.de>
+ *   Freescale Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <exports.h>
+#include <usb/ulpi.h>
+
+#define ULPI_ID_REGS_COUNT	4
+#define ULPI_TEST_VALUE		0x55	/* 0x55 == 0b01010101 */
+
+static struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+
+static int ulpi_integrity_check(u32 ulpi_viewport)
+{
+	u32 err, val, tval = ULPI_TEST_VALUE;
+	int i;
+
+	/* Use the 'special' test value to check all bits */
+	for (i = 0; i < 2; i++, tval <<= 1) {
+		err = ulpi_write(ulpi_viewport, &ulpi->scratch, tval);
+		if (err)
+			return err;
+
+		val = ulpi_read(ulpi_viewport, &ulpi->scratch);
+		if (val != tval) {
+			printf("ULPI integrity check failed\n");
+			return val;
+		}
+	}
+
+	return 0;
+}
+
+int ulpi_init(u32 ulpi_viewport)
+{
+	u32 val, id = 0;
+	u8 *reg = &ulpi->product_id_high;
+	int i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (i = 0; i < ULPI_ID_REGS_COUNT; i++) {
+		val = ulpi_read(ulpi_viewport, reg - i);
+		if (val == ULPI_ERROR)
+			return val;
+
+		id = (id << 8) | val;
+	}
+
+	/* Split ID into vendor and product ID. */
+	debug("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff);
+
+	return ulpi_integrity_check(ulpi_viewport);
+}
+
+int ulpi_select_transceiver(u32 ulpi_viewport, u8 speed)
+{
+	u8 tspeed = ULPI_FC_FULL_SPEED;
+	u32 val;
+
+	switch (speed) {
+	case ULPI_FC_HIGH_SPEED:
+	case ULPI_FC_FULL_SPEED:
+	case ULPI_FC_LOW_SPEED:
+	case ULPI_FC_FS4LS:
+		tspeed = speed;
+		break;
+	default:
+		printf("ULPI: %s: wrong transceiver speed specified, "
+			"falling back to full speed\n", __func__);
+	}
+
+	val = ulpi_read(ulpi_viewport, &ulpi->function_ctrl);
+	if (val == ULPI_ERROR)
+		return val;
+
+	/* clear the previous speed setting */
+	val = (val & ~ULPI_FC_XCVRSEL_MASK) | tspeed;
+
+	return ulpi_write(ulpi_viewport, &ulpi->function_ctrl, val);
+}
+
+int ulpi_set_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind)
+{
+	u32 flags = ULPI_OTG_DRVVBUS;
+	u8 *reg = on ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
+
+	if (ext_power)
+		flags |= ULPI_OTG_DRVVBUS_EXT;
+	if (ext_ind)
+		flags |= ULPI_OTG_EXTVBUSIND;
+
+	return ulpi_write(ulpi_viewport, reg, flags);
+}
+
+int ulpi_set_pd(u32 ulpi_viewport, int enable)
+{
+	u32 val = ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN;
+	u8 *reg = enable ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
+
+	return ulpi_write(ulpi_viewport, reg, val);
+}
+
+int ulpi_opmode_sel(u32 ulpi_viewport, u8 opmode)
+{
+	u8 topmode = ULPI_FC_OPMODE_NORMAL;
+	u32 val;
+
+	switch (opmode) {
+	case ULPI_FC_OPMODE_NORMAL:
+	case ULPI_FC_OPMODE_NONDRIVING:
+	case ULPI_FC_OPMODE_DISABLE_NRZI:
+	case ULPI_FC_OPMODE_NOSYNC_NOEOP:
+		topmode = opmode;
+		break;
+	default:
+		printf("ULPI: %s: wrong OpMode specified, "
+			"falling back to OpMode Normal\n", __func__);
+	}
+
+	val = ulpi_read(ulpi_viewport, &ulpi->function_ctrl);
+	if (val == ULPI_ERROR)
+		return val;
+
+	/* clear the previous opmode setting */
+	val = (val & ~ULPI_FC_OPMODE_MASK) | topmode;
+
+	return ulpi_write(ulpi_viewport, &ulpi->function_ctrl, val);
+}
+
+int ulpi_serial_mode_enable(u32 ulpi_viewport, u8 smode)
+{
+	switch (smode) {
+	case ULPI_IFACE_6_PIN_SERIAL_MODE:
+	case ULPI_IFACE_3_PIN_SERIAL_MODE:
+		break;
+	default:
+		printf("ULPI: %s: unrecognized Serial Mode specified\n",
+			__func__);
+		return ULPI_ERROR;
+	}
+
+	return ulpi_write(ulpi_viewport, &ulpi->iface_ctrl_set, smode);
+}
+
+int ulpi_suspend(u32 ulpi_viewport)
+{
+	u32 err;
+
+	err = ulpi_write(ulpi_viewport, &ulpi->function_ctrl_clear,
+			ULPI_FC_SUSPENDM);
+	if (err)
+		printf("ULPI: %s: failed writing the suspend bit\n", __func__);
+
+	return err;
+}
+
+/*
+ * Wait for ULPI PHY reset to complete.
+ * Actual wait for reset must be done in a view port specific way,
+ * because it involves checking the DIR line.
+ */
+static int __ulpi_reset_wait(u32 ulpi_viewport)
+{
+	u32 val;
+	int timeout = CONFIG_USB_ULPI_TIMEOUT;
+
+	/* Wait for the RESET bit to become zero */
+	while (--timeout) {
+		/*
+		 * This function is generic and suppose to work
+		 * with any viewport, so we cheat here and don't check
+		 * for the error of ulpi_read(), if there is one, then
+		 * there will be a timeout.
+		 */
+		val = ulpi_read(ulpi_viewport, &ulpi->function_ctrl);
+		if (!(val & ULPI_FC_RESET))
+			return 0;
+
+		udelay(1);
+	}
+
+	printf("ULPI: %s: reset timed out\n", __func__);
+
+	return ULPI_ERROR;
+}
+int ulpi_reset_wait(u32) __attribute__((weak, alias("__ulpi_reset_wait")));
+
+int ulpi_reset(u32 ulpi_viewport)
+{
+	u32 err;
+
+	err = ulpi_write(ulpi_viewport,
+			&ulpi->function_ctrl_set, ULPI_FC_RESET);
+	if (err) {
+		printf("ULPI: %s: failed writing reset bit\n", __func__);
+		return err;
+	}
+
+	return ulpi_reset_wait(ulpi_viewport);
+}
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
new file mode 100644
index 0000000..d871290
--- /dev/null
+++ b/include/usb/ulpi.h
@@ -0,0 +1,298 @@
+/*
+ * Generic ULPI interface.
+ *
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
+ *
+ * Authors: Jana Rapava <fermata7@gmail.com>
+ *	    Igor Grinberg <grinberg@compulab.co.il>
+ *
+ * Register offsets taken from:
+ * linux/include/linux/usb/ulpi.h
+ *
+ * Original Copyrights follow:
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * This software is distributed under the terms of the GNU General
+ * Public License ("GPL") as published by the Free Software Foundation,
+ * version 2 of that License.
+ */
+
+#ifndef __USB_ULPI_H__
+#define __USB_ULPI_H__
+
+#define ULPI_ERROR	(1 << 8) /* overflow from any register value */
+
+#ifndef CONFIG_USB_ULPI_TIMEOUT
+#define CONFIG_USB_ULPI_TIMEOUT 1000	/* timeout in us */
+#endif
+
+/*
+ * Initialize the ULPI transciever and check the interface integrity.
+ * @ulpi_viewport -  the address of the ULPI viewport register.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_init(u32 ulpi_viewport);
+
+/*
+ * Select transceiver speed.
+ * @speed	- ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default),
+ *                ULPI_FC_LOW_SPEED,  ULPI_FC_FS4LS
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_select_transceiver(u32 ulpi_viewport, u8 speed);
+
+/*
+ * Enable/disable VBUS.
+ * @ext_power		- external VBUS supply is used (default is false)
+ * @ext_indicator	- external VBUS over-current indicator is used
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_enable_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind);
+
+/*
+ * Enable/disable pull-down resistors on D+ and D- USB lines.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_set_pd(u32 ulpi_viewport, int enable);
+
+/*
+ * Select OpMode.
+ * @opmode	- ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING,
+ *		  ULPI_FC_OPMODE_DISABLE_NRZI,	   ULPI_FC_OPMODE_NOSYNC_NOEOP
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_opmode_sel(u32 ulpi_viewport, u8 opmode);
+
+/*
+ * Switch to Serial Mode.
+ * @smode	- ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ *
+ * Notes:
+ * Switches immediately to Serial Mode.
+ * To return from Serial Mode, STP line needs to be asserted.
+ */
+int ulpi_serial_mode_enable(u32 ulpi_viewport, u8 smode);
+
+/*
+ * Put PHY into low power mode.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ *
+ * Notes:
+ * STP line must be driven low to keep the PHY in suspend.
+ * To resume the PHY, STP line needs to be asserted.
+ */
+int ulpi_suspend(u32 ulpi_viewport);
+
+/*
+ * Reset the transceiver. ULPI interface and registers are not affected.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_reset(u32 ulpi_viewport);
+
+
+/* ULPI access methods below must be implemented for each ULPI viewport. */
+
+/*
+ * Write to the ULPI PHY register via the viewport.
+ * @reg		- the ULPI register (one of the fields in struct ulpi_regs).
+ * @value	- the value - only 8 lower bits are used, others ignored.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+u32 ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value);
+
+/*
+ * Read the ULPI PHY register content via the viewport.
+ * @reg		- the ULPI register (one of the fields in struct ulpi_regs).
+ *
+ * returns register content on success, ULPI_ERROR on failure.
+ */
+u32 ulpi_read(u32 ulpi_viewport, u8 *reg);
+
+/*
+ * Wait for the reset to complete.
+ * The Link must not attempt to access the PHY until the reset has
+ * completed and DIR line is de-asserted.
+ */
+int ulpi_reset_wait(u32 ulpi_viewport);
+
+/* Access Extended Register Set (indicator) */
+#define ACCESS_EXT_REGS_OFFSET	0x2f	/* read-write */
+/* Vendor-specific */
+#define VENDOR_SPEC_OFFSET	0x30
+
+/*
+ * Extended Register Set
+ *
+ * Addresses 0x00-0x3F map directly to Immediate Register Set.
+ * Addresses 0x40-0x7F are reserved.
+ * Addresses 0x80-0xff are vendor-specific.
+ */
+#define EXT_VENDOR_SPEC_OFFSET	0x80
+
+/* ULPI registers, bits and offsets definitions */
+struct ulpi_regs {
+	/* Vendor ID and Product ID: 0x00 - 0x03 Read-only */
+	u8	vendor_id_low;
+	u8	vendor_id_high;
+	u8	product_id_low;
+	u8	product_id_high;
+	/* Function Control: 0x04 - 0x06 Read */
+	u8	function_ctrl;		/* 0x04 Write */
+	u8	function_ctrl_set;	/* 0x05 Set */
+	u8	function_ctrl_clear;	/* 0x06 Clear */
+	/* Interface Control: 0x07 - 0x09 Read */
+	u8	iface_ctrl;		/* 0x07 Write */
+	u8	iface_ctrl_set;		/* 0x08 Set */
+	u8	iface_ctrl_clear;	/* 0x09 Clear */
+	/* OTG Control: 0x0A - 0x0C Read */
+	u8	otg_ctrl;		/* 0x0A Write */
+	u8	otg_ctrl_set;		/* 0x0B Set */
+	u8	otg_ctrl_clear;		/* 0x0C Clear */
+	/* USB Interrupt Enable Rising: 0x0D - 0x0F Read */
+	u8	usb_ie_rising;		/* 0x0D Write */
+	u8	usb_ie_rising_set;	/* 0x0E Set */
+	u8	usb_ie_rising_clear;	/* 0x0F Clear */
+	/* USB Interrupt Enable Falling: 0x10 - 0x12 Read */
+	u8	usb_ie_falling;		/* 0x10 Write */
+	u8	usb_ie_falling_set;	/* 0x11 Set */
+	u8	usb_ie_falling_clear;	/* 0x12 Clear */
+	/* USB Interrupt Status: 0x13 Read-only */
+	u8	usb_int_status;
+	/* USB Interrupt Latch: 0x14 Read-only with auto-clear */
+	u8	usb_int_latch;
+	/* Debug: 0x15 Read-only */
+	u8	debug;
+	/* Scratch Register: 0x16 - 0x18 Read */
+	u8	scratch;		/* 0x16 Write */
+	u8	scratch_set;		/* 0x17 Set */
+	u8	scratch_clear;		/* 0x18 Clear */
+	/*
+	 * Optional Carkit registers:
+	 * Carkit Control: 0x19 - 0x1B Read
+	 */
+	u8	carkit_ctrl;		/* 0x19 Write */
+	u8	carkit_ctrl_set;	/* 0x1A Set */
+	u8	carkit_ctrl_clear;	/* 0x1B Clear */
+	/* Carkit Interrupt Delay: 0x1C Read, Write */
+	u8	carkit_int_delay;
+	/* Carkit Interrupt Enable: 0x1D - 0x1F Read */
+	u8	carkit_ie;		/* 0x1D Write */
+	u8	carkit_ie_set;		/* 0x1E Set */
+	u8	carkit_ie_clear;	/* 0x1F Clear */
+	/* Carkit Interrupt Status: 0x20 Read-only */
+	u8	carkit_int_status;
+	/* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */
+	u8	carkit_int_latch;
+	/* Carkit Pulse Control: 0x22 - 0x24 Read */
+	u8	carkit_pulse_ctrl;		/* 0x22 Write */
+	u8	carkit_pulse_ctrl_set;		/* 0x23 Set */
+	u8	carkit_pulse_ctrl_clear;	/* 0x24 Clear */
+	/*
+	 * Other optional registers:
+	 * Transmit Positive Width: 0x25 Read, Write
+	 */
+	u8	transmit_pos_width;
+	/* Transmit Negative Width: 0x26 Read, Write */
+	u8	transmit_neg_width;
+	/* Receive Polarity Recovery: 0x27 Read, Write */
+	u8	recv_pol_recovery;
+	/*
+	 * Addresses 0x28 - 0x2E are reserved, so we use offsets
+	 * for immediate registers with higher addresses
+	 */
+};
+
+/*
+ * Register Bits
+ */
+
+/* Function Control */
+#define ULPI_FC_XCVRSEL_MASK		(3 << 0)
+#define ULPI_FC_HIGH_SPEED		(0 << 0)
+#define ULPI_FC_FULL_SPEED		(1 << 0)
+#define ULPI_FC_LOW_SPEED		(2 << 0)
+#define ULPI_FC_FS4LS			(3 << 0)
+#define ULPI_FC_TERMSELECT		(1 << 2)
+#define ULPI_FC_OPMODE_MASK		(3 << 3)
+#define ULPI_FC_OPMODE_NORMAL		(0 << 3)
+#define ULPI_FC_OPMODE_NONDRIVING	(1 << 3)
+#define ULPI_FC_OPMODE_DISABLE_NRZI	(2 << 3)
+#define ULPI_FC_OPMODE_NOSYNC_NOEOP	(3 << 3)
+#define ULPI_FC_RESET			(1 << 5)
+#define ULPI_FC_SUSPENDM		(1 << 6)
+
+/* Interface Control */
+#define ULPI_IFACE_6_PIN_SERIAL_MODE	(1 << 0)
+#define ULPI_IFACE_3_PIN_SERIAL_MODE	(1 << 1)
+#define ULPI_IFACE_CARKITMODE		(1 << 2)
+#define ULPI_IFACE_CLOCKSUSPENDM	(1 << 3)
+#define ULPI_IFACE_AUTORESUME		(1 << 4)
+#define ULPI_IFACE_EXTVBUS_COMPLEMENT	(1 << 5)
+#define ULPI_IFACE_PASSTHRU		(1 << 6)
+#define ULPI_IFACE_PROTECT_IFC_DISABLE	(1 << 7)
+
+/* OTG Control */
+#define ULPI_OTG_ID_PULLUP		(1 << 0)
+#define ULPI_OTG_DP_PULLDOWN		(1 << 1)
+#define ULPI_OTG_DM_PULLDOWN		(1 << 2)
+#define ULPI_OTG_DISCHRGVBUS		(1 << 3)
+#define ULPI_OTG_CHRGVBUS		(1 << 4)
+#define ULPI_OTG_DRVVBUS		(1 << 5)
+#define ULPI_OTG_DRVVBUS_EXT		(1 << 6)
+#define ULPI_OTG_EXTVBUSIND		(1 << 7)
+
+/*
+ * USB Interrupt Enable Rising,
+ * USB Interrupt Enable Falling,
+ * USB Interrupt Status and
+ * USB Interrupt Latch
+ */
+#define ULPI_INT_HOST_DISCONNECT	(1 << 0)
+#define ULPI_INT_VBUS_VALID		(1 << 1)
+#define ULPI_INT_SESS_VALID		(1 << 2)
+#define ULPI_INT_SESS_END		(1 << 3)
+#define ULPI_INT_IDGRD			(1 << 4)
+
+/* Debug */
+#define ULPI_DEBUG_LINESTATE0		(1 << 0)
+#define ULPI_DEBUG_LINESTATE1		(1 << 1)
+
+/* Carkit Control */
+#define ULPI_CARKIT_CTRL_CARKITPWR		(1 << 0)
+#define ULPI_CARKIT_CTRL_IDGNDDRV		(1 << 1)
+#define ULPI_CARKIT_CTRL_TXDEN			(1 << 2)
+#define ULPI_CARKIT_CTRL_RXDEN			(1 << 3)
+#define ULPI_CARKIT_CTRL_SPKLEFTEN		(1 << 4)
+#define ULPI_CARKIT_CTRL_SPKRIGHTEN		(1 << 5)
+#define ULPI_CARKIT_CTRL_MICEN			(1 << 6)
+
+/* Carkit Interrupt Enable */
+#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE		(1 << 0)
+#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL		(1 << 1)
+#define ULPI_CARKIT_INT_EN_CARINTDET		(1 << 2)
+#define ULPI_CARKIT_INT_EN_DP_RISE		(1 << 3)
+#define ULPI_CARKIT_INT_EN_DP_FALL		(1 << 4)
+
+/* Carkit Interrupt Status and Latch */
+#define ULPI_CARKIT_INT_IDFLOAT			(1 << 0)
+#define ULPI_CARKIT_INT_CARINTDET		(1 << 1)
+#define ULPI_CARKIT_INT_DP			(1 << 2)
+
+/* Carkit Pulse Control*/
+#define ULPI_CARKIT_PLS_CTRL_TXPLSEN		(1 << 0)
+#define ULPI_CARKIT_PLS_CTRL_RXPLSEN		(1 << 1)
+#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN	(1 << 2)
+#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN	(1 << 3)
+
+
+#endif /* __USB_ULPI_H__ */
-- 
1.7.7.1

[U-Boot] [PATCH 9/9] USB: efikamx: Enable USB on EfikaMX and EfikaSB

[Marek Vasut]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
---
 board/efikamx/Makefile      |    4 +
 board/efikamx/efikamx-usb.c |  210 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |   15 +++
 include/configs/efikamx.h   |   47 +++++++++--
 4 files changed, 270 insertions(+), 6 deletions(-)
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index bd1056e..fdd188e 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -29,6 +29,10 @@ LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
 
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
+
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..840bd9a
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <usb/ulpi.h>
+#include <errno.h>
+
+#include "../../drivers/usb/host/ehci.h"
+
+/* USB pin configuration */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX
+ */
+void setup_iomux_usb(void)
+{
+	setup_iomux_usb_h1();
+
+	if (machine_is_efikasb())
+		setup_iomux_usb_h2();
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB BUSes
+ */
+static void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB)
+ */
+static void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB)
+ */
+static void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+static void efika_ehci_init(struct usb_ehci *ehci, uint32_t stp_gpio,
+				uint32_t alt0, uint32_t alt1)
+{
+	int ret;
+	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+
+	mxc_request_iomux(stp_gpio, alt0);
+	mxc_iomux_set_pad(stp_gpio, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(stp_gpio), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(stp_gpio), 1);
+	udelay(1000);
+
+	mxc_request_iomux(stp_gpio, alt1);
+	mxc_iomux_set_pad(stp_gpio, USB_PAD_CONFIG);
+	udelay(10000);
+
+	ret = ulpi_init((u32)&ehci->ulpi_viewpoint);
+	if (ret) {
+		printf("Efika USB ULPI initialization failed\n");
+		return;
+	}
+
+	/* ULPI set flags */
+	ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl,
+			ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN |
+			ULPI_OTG_EXTVBUSIND);
+	ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->function_ctrl,
+			ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL |
+			ULPI_FC_SUSPENDM);
+	ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->iface_ctrl, 0);
+
+	/* Set VBus */
+	ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set,
+			ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
+
+	/*
+	 * Set VBusChrg
+	 *
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't work.
+	 */
+	ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set,
+			ULPI_OTG_CHRGVBUS);
+}
+
+int board_ehci_hcd_init(int port)
+{
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	return 0;
+}
+
+void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
+{
+	uint32_t port = OTG_BASE_ADDR + (0x200 * CONFIG_MXC_USB_PORT);
+	struct usb_ehci *ehci = (struct usb_ehci *)port;
+	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+
+	ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set,
+			ULPI_OTG_CHRGVBUS);
+
+	wait_ms(50);
+
+	/* terminate the reset */
+	*reg = ehci_readl(status_reg);
+	*reg |= EHCI_PS_PE;
+}
+
+void board_ehci_hcd_postinit(struct usb_ehci *ehci, int port)
+{
+	uint32_t tmp;
+
+	if (port == 0) {
+		/* Adjust UTMI PHY frequency to 24MHz */
+		tmp = readl(OTG_BASE_ADDR + 0x80c);
+		tmp = (tmp & ~0x3) | 0x01;
+		writel(tmp, OTG_BASE_ADDR + 0x80c);
+	} else if (port == 1) {
+		efika_ehci_init(ehci, MX51_PIN_USBH1_STP,
+				IOMUX_CONFIG_ALT2, IOMUX_CONFIG_ALT0);
+	} else if ((port == 2) && machine_is_efikasb()) {
+		efika_ehci_init(ehci, MX51_PIN_EIM_A26,
+				IOMUX_CONFIG_ALT1, IOMUX_CONFIG_ALT2);
+	}
+
+	if (port)
+		mdelay(10);
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index b78bf6c..59b35c7 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -535,6 +535,15 @@ static inline void setup_iomux_ata(void) { }
 #endif
 
 /*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+extern void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+/*
  * LED configuration
  */
 void setup_iomux_led(void)
@@ -683,6 +692,12 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
+
+	if (machine_is_efikasb())
+		setenv("preboot", "usb reset ; setenv stdin usbkbd\0");
+
+	setup_iomux_led();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index a07c8b5..d8d8fed 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -53,6 +57,8 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_EXT2
 #define CONFIG_CMD_IDE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DATE
 #undef CONFIG_CMD_IMLS
 
 /*
@@ -175,17 +181,46 @@
 #endif
 
 /*
+ * USB
+ */
+#define	CONFIG_CMD_USB
+#ifdef	CONFIG_CMD_USB
+#define	CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define	CONFIG_USB_EHCI_MX5
+#define	CONFIG_USB_ULPI
+#define	CONFIG_USB_ULPI_VIEWPORT
+#define	CONFIG_MXC_USB_PORT	1
+#if	(CONFIG_MXC_USB_PORT == 0)
+#define	CONFIG_MXC_USB_PORTSC	(1 << 28)
+#define	CONFIG_MXC_USB_FLAGS	MXC_EHCI_INTERNAL_PHY
+#else
+#define	CONFIG_MXC_USB_PORTSC	(2 << 30)
+#define	CONFIG_MXC_USB_FLAGS	0
+#endif
+#define	CONFIG_EHCI_IS_TDI
+#define	CONFIG_USB_STORAGE
+#define	CONFIG_USB_HOST_ETHER
+#define	CONFIG_USB_KEYBOARD
+#define	CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
+#define CONFIG_PREBOOT
+/* USB NET */
+#ifdef	CONFIG_CMD_NET
+#define	CONFIG_USB_ETHER_ASIX
+#define	CONFIG_NET_MULTI
+#define	CONFIG_CMD_PING
+#define	CONFIG_CMD_DHCP
+#endif
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
+#ifdef	CONFIG_CMD_NET
+#define	CONFIG_CMD_NFS
+#endif
 #endif
-
-#undef CONFIG_CMD_PING
-#undef CONFIG_CMD_DHCP
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#define CONFIG_CMD_DATE
 
 /*
  * Miscellaneous configurable options
-- 
1.7.7.1

[U-Boot] [PATCH 0/9] MX5x USB support

[Marek Vasut]

> This patchset adds the USB support for MX5x. Most of the code is based on
> work of Wolfgang Grandegger with modifications done by various other
> authors. I also included version of ULPI support code cleaned up by Igor
> Grinberg.
> 
> NOTE: I'd really love to get this code into .12 release. Remy, Wolfgang, do
> you think it'd be possible? I'd really help adoption of the MX5x USB code
> greatly as well as cleanup of the ULPI code (which is sadly in a bad
> shape).
> 
> Jana Rapava (1):
>   USB: Add generic ULPI layer and a viewport
> 
> Marek Vasut (4):
>   USB: MX5: Abstract out mx51 USB pixmux configuration
>   USB: MX5: Add MX5 usb post-init callback
>   USB: EHCI: Allow EHCI post-powerup configuration in board files
>   USB: efikamx: Enable USB on EfikaMX and EfikaSB
> 
> Wolfgang Grandegger (4):
>   USB: MX5: add helper functions to enable USB clocks
>   USB: MX5: add generic USB EHCI support for mx51 and mx53
>   USB: mx53loco: add end enable USB host support on port 1
>   USB: mx51evk: add end enable USB host support on port 1
> 
>  Makefile                                 |    1 +
>  arch/arm/cpu/armv7/mx5/clock.c           |   72 +++++++
>  arch/arm/include/asm/arch-mx5/clock.h    |    5 +
>  arch/arm/include/asm/arch-mx5/crm_regs.h |    3 +
>  board/efikamx/Makefile                   |    4 +
>  board/efikamx/efikamx-usb.c              |  210 +++++++++++++++++++++
>  board/efikamx/efikamx.c                  |   15 ++
>  board/freescale/mx51evk/mx51evk.c        |   62 ++++++
>  board/freescale/mx53loco/mx53loco.c      |   10 +
>  drivers/usb/host/Makefile                |    1 +
>  drivers/usb/host/ehci-hcd.c              |   12 +-
>  drivers/usb/host/ehci-mx5.c              |  255 +++++++++++++++++++++++++
>  drivers/usb/ulpi/Makefile                |   44 +++++
>  drivers/usb/ulpi/ulpi-viewport.c         |  118 ++++++++++++
>  drivers/usb/ulpi/ulpi.c                  |  227 +++++++++++++++++++++++
>  include/configs/efikamx.h                |   47 ++++-
>  include/configs/mx51evk.h                |   13 ++
>  include/configs/mx53loco.h               |   13 ++
>  include/usb/ehci-fsl.h                   |   16 ++
>  include/usb/ulpi.h                       |  298
> ++++++++++++++++++++++++++++++ 20 files changed, 1418 insertions(+), 8
> deletions(-)
>  create mode 100644 board/efikamx/efikamx-usb.c
>  create mode 100644 drivers/usb/host/ehci-mx5.c
>  create mode 100644 drivers/usb/ulpi/Makefile
>  create mode 100644 drivers/usb/ulpi/ulpi-viewport.c
>  create mode 100644 drivers/usb/ulpi/ulpi.c
>  create mode 100644 include/usb/ulpi.h
> 
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Jana Rapava <fermata7@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Wolfgang Grandegger <wg@denx.de>

If some of the patches didn't make it through gmail because of the different 
From:, please check git://git.denx.de/u-boot-marex.git, "usb" branch.

M

[U-Boot] [PATCH 0/9] MX5x USB support

[Wolfgang Grandegger]

Hi Marek,

On 12/07/2011 07:33 PM, Marek Vasut wrote:
> This patchset adds the USB support for MX5x. Most of the code is based on work
> of Wolfgang Grandegger with modifications done by various other authors. I also
> included version of ULPI support code cleaned up by Igor Grinberg.
> 
> NOTE: I'd really love to get this code into .12 release. Remy, Wolfgang, do you
> think it'd be possible? I'd really help adoption of the MX5x USB code greatly as
> well as cleanup of the ULPI code (which is sadly in a bad shape).

I will have time for a review and testing tomorrow. Anyway, we need some
feedback from the USB maintainer to get these patches accepted.

Wolfgang.

[U-Boot] [PATCH 0/9] MX5x USB support

[Remy Bohmer]

Hi Marek,

2011/12/7 Marek Vasut <marek.vasut@gmail.com>:
> This patchset adds the USB support for MX5x. Most of the code is based on work
> of Wolfgang Grandegger with modifications done by various other authors. I also
> included version of ULPI support code cleaned up by Igor Grinberg.
>
> NOTE: I'd really love to get this code into .12 release. Remy, Wolfgang, do you
> think it'd be possible? I'd really help adoption of the MX5x USB code greatly as
> well as cleanup of the ULPI code (which is sadly in a bad shape).

I have no objections, except that it is unclear to me what version of
the ULPI code is the latest version.
I see:
* 2 'v7' versions of the same patch
* 1 version without a version information as part of a 9 pieces series.

Kind regards,

Remy

[U-Boot] [PATCH 0/9] MX5x USB support

[Remy Bohmer]

Hi Marek,

>
> If some of the patches didn't make it through gmail because of the different
> From:, please check git://git.denx.de/u-boot-marex.git, "usb" branch.

Pulling it failed. Can you please rebase it on top of current
u-boot-usb, then I will pull it from there.

Kind regards,

Remy

[U-Boot] [PATCH 0/9] MX5x USB support

[Marek Vasut]

> Hi Marek,
> 
> 2011/12/7 Marek Vasut <marek.vasut@gmail.com>:
> > This patchset adds the USB support for MX5x. Most of the code is based on
> > work of Wolfgang Grandegger with modifications done by various other
> > authors. I also included version of ULPI support code cleaned up by Igor
> > Grinberg.
> > 
> > NOTE: I'd really love to get this code into .12 release. Remy, Wolfgang,
> > do you think it'd be possible? I'd really help adoption of the MX5x USB
> > code greatly as well as cleanup of the ULPI code (which is sadly in a
> > bad shape).
> 
> I have no objections, except that it is unclear to me what version of
> the ULPI code is the latest version.
> I see:
> * 2 'v7' versions of the same patch

Oh well, it is unclear to me how Jana versioned that stuff. When Igor picked it 
up, I think he did the v7. When I picked Igor's version, I dropped the changelog 
as it carried no useful information.

> * 1 version without a version information as part of a 9 pieces series.

Yea, that's the good one. I'll rebase it tonight.

M

[U-Boot] [PATCH 0/9] MX5x USB support

[Marek Vasut]

> > Hi Marek,
> > 
> > 2011/12/7 Marek Vasut <marek.vasut@gmail.com>:
> > > This patchset adds the USB support for MX5x. Most of the code is based
> > > on work of Wolfgang Grandegger with modifications done by various
> > > other authors. I also included version of ULPI support code cleaned up
> > > by Igor Grinberg.
> > > 
> > > NOTE: I'd really love to get this code into .12 release. Remy,
> > > Wolfgang, do you think it'd be possible? I'd really help adoption of
> > > the MX5x USB code greatly as well as cleanup of the ULPI code (which
> > > is sadly in a bad shape).
> > 
> > I have no objections, except that it is unclear to me what version of
> > the ULPI code is the latest version.
> > I see:
> > * 2 'v7' versions of the same patch
> 
> Oh well, it is unclear to me how Jana versioned that stuff. When Igor
> picked it up, I think he did the v7. When I picked Igor's version, I
> dropped the changelog as it carried no useful information.
> 
> > * 1 version without a version information as part of a 9 pieces series.
> 
> Yea, that's the good one. I'll rebase it tonight.

Rebase on u-boot-usb/master and pushed to git://git.denx.de/u-boot-marex.git , 
branch "usb2" !

M