[U-Boot] [PATCH] Fix DP8381x driver to work with mips processors

[U-Boot] [PATCH] Fix DP8381x driver to work with mips processors

[Laszlo Hegedüs]

Fix for the DP8381x driver to translate the pointers to the receive
Rinbuffer from a virtual address to the PCI memory space. TxRingPtr
is translated okay, but no memory translation was done for
RxRingPtr. This patch fix this error by adding calls to
"phys_to_bus" in multiple places.

The Bug:
...
b2004020: 07ff9254 10f01002 00000000 00000000    T...............
b2004030: 87ff9214 00700020 00000000 00000000    .... .p.........

The address b2004000 is the base of the on board DP82815. The
TxRingPtr is located at the register b2004020 while the RxRingPtr
is at b2004030. As it can be seen, the TxRingPtr is translated
(the base of the PCI system memory is located at 0x00000000),
but RxRingPtr is still a virtual address in KSEG0. This prevents
the nic to write the received packets into the main memory.

Signed-off-by: Laszlo Hegedues <laszlo.hegedues@gmail.com>
---
 drivers/net/natsemi.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 9386adf..1cdfe2f 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -661,7 +661,7 @@ natsemi_init_txd(struct eth_device *dev)
 	txd.bufptr = (u32) & txb[0];
 
 	/* load Transmit Descriptor Register */
-	OUTL(dev, (u32) & txd, TxRingPtr);
+	OUTL(dev, phys_to_bus((u32) &txd), TxRingPtr);
 #ifdef NATSEMI_DEBUG
 	printf("natsemi_init_txd: TX descriptor reg loaded with: %#08X\n",
 	       INL(dev, TxRingPtr));
@@ -687,12 +687,12 @@ natsemi_init_rxd(struct eth_device *dev)
 	/* init RX descriptor */
 	for (i = 0; i < NUM_RX_DESC; i++) {
 		rxd[i].link =
-		    cpu_to_le32((i + 1 <
+		    cpu_to_le32(phys_to_bus((i + 1 <
 				 NUM_RX_DESC) ? (u32) & rxd[i +
 							    1] : (u32) &
-				rxd[0]);
+				rxd[0]));
 		rxd[i].cmdsts = cpu_to_le32((u32) RX_BUF_SIZE);
-		rxd[i].bufptr = cpu_to_le32((u32) & rxb[i * RX_BUF_SIZE]);
+		rxd[i].bufptr = cpu_to_le32(phys_to_bus((u32) &rxb[i * RX_BUF_SIZE]));
 #ifdef NATSEMI_DEBUG
 		printf
 		    ("natsemi_init_rxd: rxd[%d]=%p link=%X cmdsts=%lX bufptr=%X\n",
@@ -702,7 +702,7 @@ natsemi_init_rxd(struct eth_device *dev)
 	}
 
 	/* load Receive Descriptor Register */
-	OUTL(dev, (u32) & rxd[0], RxRingPtr);
+	OUTL(dev, phys_to_bus((u32) &rxd[0]), RxRingPtr);
 
 #ifdef NATSEMI_DEBUG
 	printf("natsemi_init_rxd: RX descriptor register loaded with: %X\n",
@@ -849,7 +849,7 @@ natsemi_poll(struct eth_device *dev)
 
 	/* return the descriptor and buffer to receive ring */
 	rxd[cur_rx].cmdsts = cpu_to_le32(RX_BUF_SIZE);
-	rxd[cur_rx].bufptr = cpu_to_le32((u32) & rxb[cur_rx * RX_BUF_SIZE]);
+	rxd[cur_rx].bufptr = cpu_to_le32(phys_to_bus((u32) &rxb[cur_rx * RX_BUF_SIZE]));
 
 	if (++cur_rx == NUM_RX_DESC)
 		cur_rx = 0;
-- 
1.7.5.4

[U-Boot] [PATCH] Fix DP8381x driver to work with mips processors

[Anatolij Gustschin]

Hi all,

On Wed, 26 Oct 2011 14:39:54 +0200
Laszlo Heged?s <laszlo.hegedues@gmail.com> wrote:

> Fix for the DP8381x driver to translate the pointers to the receive
> Rinbuffer from a virtual address to the PCI memory space. TxRingPtr
> is translated okay, but no memory translation was done for
> RxRingPtr. This patch fix this error by adding calls to
> "phys_to_bus" in multiple places.
> 
> The Bug:
> ...
> b2004020: 07ff9254 10f01002 00000000 00000000    T...............
> b2004030: 87ff9214 00700020 00000000 00000000    .... .p.........
> 
> The address b2004000 is the base of the on board DP82815. The
> TxRingPtr is located at the register b2004020 while the RxRingPtr
> is at b2004030. As it can be seen, the TxRingPtr is translated
> (the base of the PCI system memory is located at 0x00000000),
> but RxRingPtr is still a virtual address in KSEG0. This prevents
> the nic to write the received packets into the main memory.
> 
> Signed-off-by: Laszlo Hegedues <laszlo.hegedues@gmail.com>
> ---
>  drivers/net/natsemi.c |   12 ++++++------
>  1 files changed, 6 insertions(+), 6 deletions(-)

It would be great if someone could test this patch and
send an Acked-by/Tested-by. Anyone on the list who could
test it?

Thanks,
Anatolij