[U-Boot] [PATCH] lsxl: add support for lschlv2 and lsxhl

Michael Walle
2012-01-02T23:11:49Z

This patchset adds support for both the Linkstation Live (LS-CHLv2) and
Linkstation Pro (LS-XHL) by Buffalo.

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
---
MAINTAINERS | 4 +
board/Marvell/lsxl/Makefile | 50 +++++++
board/Marvell/lsxl/config.mk | 1 +
board/Marvell/lsxl/kwbimage-lschl.cfg | 66 +++++++++
board/Marvell/lsxl/kwbimage-lsxhl.cfg | 66 +++++++++
board/Marvell/lsxl/lsxl.c | 233 +++++++++++++++++++++++++++++++++
board/Marvell/lsxl/lsxl.h | 75 +++++++++++
boards.cfg | 3 +
include/configs/lsxl.h | 175 +++++++++++++++++++++++++
9 files changed, 673 insertions(+), 0 deletions(-)
create mode 100644 board/Marvell/lsxl/Makefile
create mode 100644 board/Marvell/lsxl/config.mk
create mode 100644 board/Marvell/lsxl/kwbimage-lschl.cfg
create mode 100644 board/Marvell/lsxl/kwbimage-lsxhl.cfg
create mode 100644 board/Marvell/lsxl/lsxl.c
create mode 100644 board/Marvell/lsxl/lsxl.h
create mode 100644 include/configs/lsxl.h

diff --git a/MAINTAINERS b/MAINTAINERS
index a56ca10..f55cd3b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -876,6 +876,10 @@ Prafulla Wadaskar <prafulla@marvell.com>
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug ARM926EJS (Kirkwood SoC)

+Michael Walle <michael@walle.cc>
+
+ lsxl ARM926EJS (Kirkwood SoC)
+
Tom Warren <twarren@nvidia.com>

harmony Tegra2 (ARM7 & A9 Dual Core)
diff --git a/board/Marvell/lsxl/Makefile b/board/Marvell/lsxl/Makefile
new file mode 100644
index 0000000..4c08079
--- /dev/null
+++ b/board/Marvell/lsxl/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (c) 2011 Michael Walle
+# Michael Walle <michael@walle.cc>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := lsxl.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/lsxl/config.mk b/board/Marvell/lsxl/config.mk
new file mode 100644
index 0000000..062554b
--- /dev/null
+++ b/board/Marvell/lsxl/config.mk
@@ -0,0 +1 @@
+ALL-y += $(obj)u-boot.kwb
diff --git a/board/Marvell/lsxl/kwbimage-lschl.cfg b/board/Marvell/lsxl/kwbimage-lschl.cfg
new file mode 100644
index 0000000..4d96c3f
--- /dev/null
+++ b/board/Marvell/lsxl/kwbimage-lschl.cfg
@@ -0,0 +1,66 @@
+#
+# Copyright (c) 2011 Michael Walle
+# Michael Walle <michael@walle.cc>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi # Boot from SPI flash
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100E0 0x1B1B1B9B
+
+DATA 0xFFD20134 0xBBBBBBBB # L2 RAM Timing 0
+DATA 0xFFD20138 0x00BBBBBB # L2 RAM Timint 1
+
+# DRAM configuration
+DATA 0xFFD01400 0x43000618 # DDR Configuration register
+DATA 0xFFD01404 0x39543000 # DDR Controller Control Low
+DATA 0xFFD01408 0x3302444F # DDR Timing (Low)
+DATA 0xFFD0140C 0x00000823 # DDR Timing (High)
+DATA 0xFFD01410 0x00000009 # DDR Address Control
+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
+DATA 0xFFD01418 0x00000000 # DDR Operation
+DATA 0xFFD0141C 0x00000652 # DDR Mode
+DATA 0xFFD01420 0x00000042 # DDR Extended Mode
+DATA 0xFFD01424 0x0000F1FF # DDR Controller Control High
+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
+DATA 0xFFD0142C 0x00000000 # DDR Operation Control
+
+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x03FFFFF1 # CS[0]n Size
+DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled
+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x003C0000 # DDR ODT Control (Low)
+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
+DATA 0xFFD0149C 0x0000E80F # CPU ODT Control
+DATA 0xFFD01480 0x00000001 # DDR Initialization Control
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/board/Marvell/lsxl/kwbimage-lsxhl.cfg b/board/Marvell/lsxl/kwbimage-lsxhl.cfg
new file mode 100644
index 0000000..1f978fe
--- /dev/null
+++ b/board/Marvell/lsxl/kwbimage-lsxhl.cfg
@@ -0,0 +1,66 @@
+#
+# Copyright (c) 2011 Michael Walle
+# Michael Walle <michael@walle.cc>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi # Boot from SPI flash
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100E0 0x1B1B9B9B
+
+DATA 0xFFD20134 0xBBBBBBBB # L2 RAM Timing 0
+DATA 0xFFD20138 0x00BBBBBB # L2 RAM Timint 1
+
+# DRAM configuration
+DATA 0xFFD01400 0x43000618 # DDR Configuration register
+DATA 0xFFD01404 0x39543010 # DDR Controller Control Low
+DATA 0xFFD01408 0x22125441 # DDR Timing (Low)
+DATA 0xFFD0140C 0x00000832 # DDR Timing (High)
+DATA 0xFFD01410 0x0000000C # DDR Address Control
+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
+DATA 0xFFD01418 0x00000000 # DDR Operation
+DATA 0xFFD0141C 0x00000652 # DDR Mode
+DATA 0xFFD01420 0x00000006 # DDR Extended Mode
+DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
+DATA 0xFFD0142C 0x00000000 # DDR Operation Control
+
+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size
+DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled
+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
+DATA 0xFFD0149C 0x0000E80F # CPU ODT Control
+DATA 0xFFD01480 0x00000001 # DDR Initialization Control
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/board/Marvell/lsxl/lsxl.c b/board/Marvell/lsxl/lsxl.c
new file mode 100644
index 0000000..d6e861c
--- /dev/null
+++ b/board/Marvell/lsxl/lsxl.c
@@ -0,0 +1,233 @@
+/*
+ * Copyright (c) 2011 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * Based on sheevaplug/sheevaplug.c by
+ * Marvell Semiconductor <www.marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <miiphy.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include <asm/arch/gpio.h>
+#include <spi_flash.h>
+#include "lsxl.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+ /*
+ * default gpio configuration
+ * There are maximum 64 gpios controlled through 2 sets of registers
+ * the below configuration configures mainly initial LED status
+ */
+ kw_config_gpio(LSXL_OE_VAL_LOW,
+ LSXL_OE_VAL_HIGH,
+ LSXL_OE_LOW, LSXL_OE_HIGH);
+
+ /* Multi-Purpose Pins Functionality configuration */
+ u32 kwmpp_config[] = {
+ MPP0_SPI_SCn,
+ MPP1_SPI_MOSI,
+ MPP2_SPI_SCK,
+ MPP3_SPI_MISO,
+ MPP4_UART0_RXD,
+ MPP5_UART0_TXD,
+ MPP6_SYSRST_OUTn,
+ MPP7_GPO,
+ MPP8_GPIO,
+ MPP9_GPIO,
+ MPP10_GPO,
+ MPP11_GPIO,
+ MPP12_SD_CLK,
+ MPP13_SD_CMD,
+ MPP14_SD_D0,
+ MPP15_SD_D1,
+ MPP16_SD_D2,
+ MPP17_SD_D3,
+ MPP18_GPO,
+ MPP19_GPO,
+ MPP20_GE1_0,
+ MPP21_GE1_1,
+ MPP22_GE1_2,
+ MPP23_GE1_3,
+ MPP24_GE1_4,
+ MPP25_GE1_5,
+ MPP26_GE1_6,
+ MPP27_GE1_7,
+ MPP28_GPIO,
+ MPP29_GPIO,
+ MPP30_GE1_10,
+ MPP31_GE1_11,
+ MPP32_GE1_12,
+ MPP33_GE1_13,
+ MPP34_GPIO,
+ MPP35_GPIO,
+ MPP36_GPIO,
+ MPP37_GPIO,
+ MPP38_GPIO,
+ MPP39_GPIO,
+ MPP40_GPIO,
+ MPP41_GPIO,
+ MPP42_GPIO,
+ MPP43_GPIO,
+ MPP44_GPIO,
+ MPP45_GPIO,
+ MPP46_GPIO,
+ MPP47_GPIO,
+ MPP48_GPIO,
+ MPP49_GPIO,
+ 0
+ };
+
+ kirkwood_mpp_conf(kwmpp_config);
+
+ return 0;
+}
+
+#define LED_OFF 0
+#define LED_ALARM_ON 1
+#define LED_ALARM_BLINKING 2
+#define LED_POWER_ON 3
+#define LED_POWER_BLINKING 4
+#define LED_INFO_ON 5
+#define LED_INFO_BLINKING 6
+
+static void __set_led(int blink_alarm, int blink_info, int blink_power,
+ int value_alarm, int value_info, int value_power)
+{
+ kw_gpio_set_blink(GPIO_ALARM_LED, blink_alarm);
+ kw_gpio_set_blink(GPIO_INFO_LED, blink_info);
+ kw_gpio_set_blink(GPIO_POWER_LED, blink_power);
+ kw_gpio_set_value(GPIO_ALARM_LED, value_alarm);
+ kw_gpio_set_value(GPIO_INFO_LED, value_info);
+ kw_gpio_set_value(GPIO_POWER_LED, value_power);
+}
+
+static void set_led(int state)
+{
+ switch (state) {
+ case LED_OFF:
+ __set_led(0, 0, 0, 0, 0, 0);
+ break;
+ case LED_ALARM_ON:
+ __set_led(0, 0, 0, 0, 1, 1);
+ break;
+ case LED_ALARM_BLINKING:
+ __set_led(1, 0, 0, 1, 1, 1);
+ break;
+ case LED_INFO_ON:
+ __set_led(0, 0, 0, 1, 0, 1);
+ break;
+ case LED_INFO_BLINKING:
+ __set_led(0, 1, 0, 1, 1, 1);
+ break;
+ case LED_POWER_ON:
+ __set_led(0, 0, 0, 1, 1, 0);
+ break;
+ case LED_POWER_BLINKING:
+ __set_led(0, 0, 1, 1, 1, 1);
+ break;
+ }
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+ set_led(LED_POWER_BLINKING);
+
+ return 0;
+}
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+ int i = 0;
+ struct spi_flash *flash;
+
+ while (!kw_gpio_get_value(GPIO_FUNC_BUTTON)) {
+ udelay(100000);
+ i++;
+
+ if (i == 10)
+ set_led(LED_INFO_ON);
+
+ if (i >= 100) {
+ set_led(LED_INFO_BLINKING);
+ break;
+ }
+ }
+
+ if (i >= 100) {
+ printf("Erasing flash..\n");
+ flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+ if (!flash) {
+ printf(" FAILED\n");
+ return 1;
+ }
+
+ spi_flash_erase(flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE);
+ spi_flash_free(flash);
+ do_reset(NULL, 0, 0, NULL);
+ } else if (i >= 10) {
+ printf("Netbooting selected\n");
+ setenv("bootsource", "net");
+ }
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+void show_boot_progress(int progress)
+{
+ if (progress < 0) {
+ set_led(LED_ALARM_BLINKING);
+ return;
+ }
+}
+#endif
+
+#ifdef CONFIG_RESET_PHY_R
+/* Configure and enable MV88E1118 PHY */
+void reset_phy(void)
+{
+ u16 devadr;
+ char *name = "egiga1";
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+ printf("Err..%s could not read PHY dev address\n", __func__);
+ return;
+ }
+
+ /* reset the phy */
+ miiphy_reset(name, devadr);
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/lsxl/lsxl.h b/board/Marvell/lsxl/lsxl.h
new file mode 100644
index 0000000..db6108f
--- /dev/null
+++ b/board/Marvell/lsxl/lsxl.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2011 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __LSXL_H
+#define __LSXL_H
+
+#define GPIO_HDD_POWER 10
+#define GPIO_USB_VBUS 11
+#define GPIO_FAN_HIGH 18
+#define GPIO_FAN_LOW 19
+#define GPIO_FUNC_LED 36
+#define GPIO_ALARM_LED 37
+#define GPIO_INFO_LED 38
+#define GPIO_POWER_LED 39
+#define GPIO_FAN_LOCK 40
+#define GPIO_FUNC_BUTTON 41
+#define GPIO_POWER_SWITCH 42
+#define GPIO_POWER_AUTO_SWITCH 43
+#define GPIO_FUNC_RED_LED 48
+
+#define _BIT(x) (1<<(x))
+
+#define LSXL_OE_LOW (~(_BIT(GPIO_HDD_POWER) \
+ | _BIT(GPIO_USB_VBUS) \
+ | _BIT(GPIO_FAN_HIGH) \
+ | _BIT(GPIO_FAN_LOW)))
+
+#define LSXL_OE_HIGH (~(_BIT(GPIO_FUNC_LED - 32) \
+ | _BIT(GPIO_ALARM_LED - 32) \
+ | _BIT(GPIO_INFO_LED - 32) \
+ | _BIT(GPIO_POWER_LED - 32) \
+ | _BIT(GPIO_FUNC_RED_LED - 32)))
+
+#define LSXL_OE_VAL_LOW (_BIT(GPIO_HDD_POWER) \
+ | _BIT(GPIO_USB_VBUS))
+
+#define LSXL_OE_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32) \
+ | _BIT(GPIO_ALARM_LED - 32) \
+ | _BIT(GPIO_INFO_LED - 32) \
+ | _BIT(GPIO_POWER_LED - 32) \
+ | _BIT(GPIO_FUNC_RED_LED - 32))
+
+#define LSXL_POL_VAL_LOW (_BIT(GPIO_FAN_HIGH) \
+ | _BIT(GPIO_FAN_LOW))
+
+#define LSXL_POL_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32) \
+ | _BIT(GPIO_ALARM_LED - 32) \
+ | _BIT(GPIO_INFO_LED - 32) \
+ | _BIT(GPIO_POWER_LED - 32) \
+ | _BIT(GPIO_FUNC_BUTTON - 32) \
+ | _BIT(GPIO_POWER_SWITCH - 32) \
+ | _BIT(GPIO_POWER_AUTO_SWITCH - 32) \
+ | _BIT(GPIO_FUNC_RED_LED - 32))
+
+#endif /* __LSXL_H */
diff --git a/boards.cfg b/boards.cfg
index 66c27a4..f4e5575 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -152,6 +152,9 @@ openrd_client arm arm926ejs openrd Marvell
openrd_ultimate arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_ULTIMATE
rd6281a arm arm926ejs - Marvell kirkwood
sheevaplug arm arm926ejs - Marvell kirkwood
+lsxhl arm arm926ejs lsxl Marvell kirkwood lsxl:LSXHL
+lschl arm arm926ejs lsxl Marvell kirkwood lsxl:LSCHL
+lschl_ramboot arm arm926ejs lsxl Marvell kirkwood lsxl:LSCHL,SYS_RAMBOOT,SYS_TEXT_BASE=0x00700000
dockstar arm arm926ejs - Seagate kirkwood
jadecpu arm arm926ejs jadecpu syteco mb86r0x
mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
new file mode 100644
index 0000000..cca46fc
--- /dev/null
+++ b/include/configs/lsxl.h
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2011 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_LSXL_H
+#define _CONFIG_LSXL_H
+
+/*
+ * Version number information
+ */
+#if defined(CONFIG_LSCHL)
+#define CONFIG_IDENT_STRING "\nBuffalo Linkstation Live (LS-CHLv2)"
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
+#define CONFIG_MACH_TYPE 3006
+#elif defined(CONFIG_LSXHL)
+#define CONFIG_IDENT_STRING "\nBuffalo Linkstation Pro (LS-XHL)"
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
+#define CONFIG_MACH_TYPE 2663
+#else
+#error "unknown board"
+#endif
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
+#define CONFIG_KIRKWOOD 1 /* SOC Family Name */
+#define CONFIG_KW88F6281 1 /* SOC Name */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_KIRKWOOD_GPIO
+#define CONFIG_SHOW_BOOT_PROGRESS
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+#define CONFIG_SYS_TCLK 166666666
+
+/*
+ * Commands configuration
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_EXT2
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+#ifdef CONFIG_SYS_RAMBOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+#undef CONFIG_ENV_OVERWRITE
+
+/* ST M25P40 */
+#undef CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_SPI_FLASH_STMICRO 1
+#undef CONFIG_ENV_SPI_MAX_HZ
+#define CONFIG_ENV_SPI_MAX_HZ 25000000
+#undef CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_SF_DEFAULT_SPEED 25000000
+
+
+#undef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+#define CONFIG_SYS_FAULT_MII_ADDR 0x8
+
+/*
+ * Environment variables configurations
+ */
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 8
+#define CONFIG_ENV_IS_IN_SPI_FLASH 1
+#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K */
+#else
+#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
+#endif
+#define CONFIG_ENV_SIZE 0x10000 /* 64k */
+#define CONFIG_ENV_OFFSET 0x70000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_LOADADDR 0x00800000
+
+/* Normally the ethernet address is stored within the u-boot environment, but
+ * in case of a recovery this environment is deleted and the board is only
+ * accessible through the netconsole. For this case you need an initial MAC
+ * address. The user is then supposed to set the address in the environment
+ * manually.
+ */
+#define CONFIG_ETHADDR 02:00:01:00:00:00
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+
+/* Use the same addresses like the original bootloader */
+#define CONFIG_IPADDR 192.168.11.150
+#define CONFIG_SERVERIP 192.168.11.1
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_BOOTCOMMAND "run bootcmd_${bootsource}"
+#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/sda2 " \
+ "netconsole=@"MK_STR(CONFIG_IPADDR)"/eth1"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootsource=hdd\0" \
+ "hdpart=0:1\0" \
+ "bootcmd_net=tftpboot 0x00100000 uImage; " \
+ "tftpboot 0x00800000 uInitrd; " \
+ "bootm 0x00100000 0x00800000\0" \
+ "bootcmd_hdd=ide reset; ext2load ide ${hdpart} 0x00100000 /uImage; " \
+ "ext2load ide ${hdpart} 0x00800000 /uInitrd; " \
+ "bootm 0x00100000 0x00800000\0" \
+ "eraseenv=sf probe 0; " \
+ "sf erase "MK_STR(CONFIG_ENV_OFFSET)"+"MK_STR(CONFIG_ENV_SIZE)"\0" \
+ "ncip="MK_STR(CONFIG_SERVERIP)"\0" \
+ "stdin=nc\0" \
+ "stdout=nc\0" \
+ "stderr=nc\0" \
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_MVGBE_PORTS {0, 1} /* enable port 1 only */
+#define CONFIG_PHY_BASE_ADR 7
+#endif /* CONFIG_CMD_NET */
+
+#ifdef CONFIG_CMD_IDE
+#undef CONFIG_IDE_LED
+#undef CONFIG_SYS_IDE_MAXBUS
+#undef CONFIG_SYS_IDE_MAXDEVICE
+#define CONFIG_SYS_IDE_MAXBUS 1
+#define CONFIG_SYS_IDE_MAXDEVICE 1
+#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
+#endif
+
+#endif /* _CONFIG_LSXL_H */
--
1.7.2.5