From mboxrd@z Thu Jan  1 00:00:00 1970
From: Sughosh Ganu <urwithsughosh@gmail.com>
Date: Wed, 11 Jan 2012 19:01:29 +0530
Subject: [U-Boot] [PATCH 1/2 V2] arm926: Flush the data cache before
 disabling it.
In-Reply-To: <201201111342.38690.marek.vasut@gmail.com>
References: <1326133550-6706-1-git-send-email-urwithsughosh@gmail.com>
	<201201111147.27746.marek.vasut@gmail.com>
	<20120111121120.GA3260@Hardy>
	<201201111342.38690.marek.vasut@gmail.com>
Message-ID: <20120111133129.GB3260@Hardy>
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On Wed Jan 11, 2012 at 01:42:38PM +0100, Marek Vasut wrote:
> > On Wed Jan 11, 2012 at 11:47:27AM +0100, Marek Vasut wrote:
> > > > On Tue Jan 10, 2012 at 09:07:58PM +0100, Marek Vasut wrote:
> > > > > > The current implementation invalidates the cache instead of
> > > > > > flushing it. This causes problems on platforms where the
> > > > > > spl/u-boot is already loaded to the RAM, with caches enabled by a
> > > > > > first stage bootloader.
> > > > > 
> > > > > What platforms are affected?
> > > > > 
> > > >   It is causing a problem on the hawkboard, where the spl is loaded
> > > >   directly to the RAM by a rom bootloader. We did not see this earlier
> > > >   since cpu_init_crit was not getting called due to
> > > >   CONFIG_SKIP_LOWLEVEL_INIT.
> > > > 
> > > > -sughosh
> > > 
> > > I see ... why don't you directly load U-Boot to DRAM then ?
> > 
> >   The rom bootloader(rbl) uses a different ecc layout from the one
> >   used by the davinci nand driver(u-boot and linux).
> 
> Can't you just tell the driver to use the correct ecc layout when
> flashing then?

  Changing the ecc layout for a single board, hmm not sure. Using a
  spl instead does me no harm whatsoever -- I don't need to update the
  spl frequently in any case, and then can use the nand driver as is.

-sughosh