From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sughosh Ganu Date: Thu, 12 Jan 2012 11:59:02 +0530 Subject: [U-Boot] [PATCH 1/2 V2] arm926: Flush the data cache before disabling it. In-Reply-To: References: <1326133550-6706-1-git-send-email-urwithsughosh@gmail.com> <201201111950.50699.marek.vasut@gmail.com> <201201112313.41176.marek.vasut@gmail.com> Message-ID: <20120112062902.GB5879@Hardy> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu Jan 12, 2012 at 06:56:01AM +0100, Christian Riesch wrote: > On Wednesday, January 11, 2012, Marek Vasut wrote: > >> RBL executes an AIS script. Sughosh, could you please explain what your > AIS > >> does or how you create it? > > > > So basically, this SPL business can be avoided and this all can be done > in a > > standard way? > > I don't know, I never had to deal with booting from NAND. I was just > wondering what Sughosh's AIS is doing that he gets these SPL problems. > Christian I have checked my ais ini file, and it does the normal pll/ddr settings. I think it is the rbl which might be turning the cache ON. In any case, this patch holds true irrespective of whether rbl boots u-boot or spl. As for the question of doing away with spl and booting u-boot directly on hawkboard, i would want to stay with spl for now. I would check if we can pass the ecc layout to the nand driver in a clean elegant way, as Marek has suggested. -sughosh