[U-Boot] [PATCH v2 3/9] openrisc: Add cpu files

Stefan Kristiansson
2011-12-22T11:39:32Z

On Thu, Dec 22, 2011 at 10:09:30AM +0100, Michal Simek wrote:
> Stefan Kristiansson wrote:
> >+
> >+void dcache_enable(void)
> >+{
> >+ mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_DCE);
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
> >+ asm volatile("l.nop");
>
> This is interesting. Are there 8 nops?
> Is there any reason for that? Is it just any waiting?
> If yes, maybe it will be worth to add any comment.
>

Yes, the number of nops are kind of arbitrary,
they are there to add some headroom for the cache
to startup without any load/stores in flight.

But you are right, a comment about this might be in place.

Stefan