From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 25 Jan 2012 17:50:39 +0100 Subject: [U-Boot] mx28 spl power cpu clock configuration In-Reply-To: <6EA3E0BCC03CC34B89B01BD57ECBC718F27241@POBOX.postoffice.danego.net> References: <6EA3E0BCC03CC34B89B01BD57ECBC718F26BC7@POBOX.postoffice.danego.net> <6EA3E0BCC03CC34B89B01BD57ECBC718F27241@POBOX.postoffice.danego.net> Message-ID: <201201251750.39571.marek.vasut@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > Hi Fabio, > > > Could you please post a patch with your proposed change so that we can > > test it? > > I was hoping for a suggestion from you, as you know this SoC far better > than me. Currently I am trying different solutions. Even though they > prevent the system from hanging up, they still don't enable me to step > through the code. >From your previous email, it looked like that was proper solution. You can still send a patch so we can test and proceed further in sync. > And since therey's no problem with normal operation, I > think they aren't worth anything unless they fix instruction stepping. What do you mean? > > But as Marek, says: Instruction stepping this section can fail for another > reason. I never said such sentence. M > > Cheers, > > Robert.