From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] mx28 spl power cpu clock configuration
Date: Thu, 26 Jan 2012 19:32:04 +0100 [thread overview]
Message-ID: <201201261932.04853.marek.vasut@gmail.com> (raw)
In-Reply-To: <CAOMZO5BBEdLHiG=a3=3Pa=o3ZCxX9kXCEfxLwEWKGdKGWBhWjQ@mail.gmail.com>
> Hi Robert,
>
> On 1/25/12, Marek Vasut <marek.vasut@gmail.com> wrote:
> >> Shouldn't we configure clkctrl_frac0 - or at least disable CPU clock
> >> gating - before disabling PLL bypass?
> >
> > This seems reasonable. Fabio, can you comment?
>
> Could you please post a patch with your proposed change so that we can test
> it?
>
Hi Fabio,
I bought a really crappy custom board a few days ago (some china-made crap)
sporting mx287, but apparently I'm hitting similar issue you do here.
When I swap power_init and mem_init though, the board boots fine, othervise it
hangs.
M
next prev parent reply other threads:[~2012-01-26 18:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-25 14:40 [U-Boot] mx28 spl power cpu clock configuration Robert Deliën
2012-01-25 15:04 ` Marek Vasut
2012-01-25 15:38 ` Fabio Estevam
2012-01-25 16:36 ` Robert Deliën
2012-01-25 16:50 ` Marek Vasut
2012-01-25 17:01 ` Robert Deliën
2012-01-25 17:12 ` Marek Vasut
2012-01-25 17:26 ` Robert Deliën
2012-01-25 17:32 ` Marek Vasut
2012-01-26 11:44 ` Robert Deliën
2012-01-30 20:31 ` Fabio Estevam
2012-01-30 21:53 ` Marek Vasut
2012-01-30 22:17 ` Fabio Estevam
2012-01-30 23:26 ` Marek Vasut
2012-01-30 22:09 ` Robert Deliën
2012-01-26 18:32 ` Marek Vasut [this message]
2012-01-27 0:11 ` Fabio Estevam
2012-01-27 0:47 ` Marek Vasut
2012-01-27 8:40 ` Robert Deliën
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