[U-Boot] [PATCH V3] mx28: fix SPL code to make USB booting work

Marek Vasut
2012-02-07T16:54:42Z

> This patch fixes booting i.MX28 CPUs via USB download.
> In this mode the CPU's bootrom implements a USB HID device that
> accepts a bootstream.
>
> When downloading the bootstream via USB, first the SPL code is
> received and executed. Then the u-boot image is received and
> called.
>
> The USB bootmode is interrupt driven.
>
> This patch fixes two things:
>
> 1) The ARM's fast interrupt mode is disabled when the SPL code
> has been run. So save and restore the CPSR register.
>
> 2) Save and restore c1 control register: the exception vector
> location needs to be set back to bootrom space to make the USB
> interrupts work again. The SPL code needs to change this
> option for the ram size probing.
>
> Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
> ---
> changes in v2:
> - store old SPSR on stack instead of jiggling around with some bits
> - remove #ifndef CONFIG_SKIP_LOWLEVEL_INIT
> changes in v3:
> - also store C1 register on stack
>
> arch/arm/cpu/arm926ejs/mx28/start.S | 21 ++++++++++++++++++++-
> 1 files changed, 20 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
> b/arch/arm/cpu/arm926ejs/mx28/start.S index 2cd4d73..e572b78 100644
> --- a/arch/arm/cpu/arm926ejs/mx28/start.S
> +++ b/arch/arm/cpu/arm926ejs/mx28/start.S
> @@ -167,10 +167,15 @@ _reset:
> */
> push {r0-r12,r14}
>
> + /* save control register c1 */
> + mrc p15, 0, r0, c1, c0, 0
> + push {r0}
> +
> /*
> - * set the cpu to SVC32 mode
> + * set the cpu to SVC32 mode and store old CPSR register content
> */
> mrs r0,cpsr
> + push {r0}
> bic r0,r0,#0x1f
> orr r0,r0,#0xd3
> msr cpsr,r0
> @@ -185,6 +190,20 @@ _reset:
>
> bl board_init_ll
>
> + /*
> + * restore bootrom's cpu mode (especially FIQ)
> + */
> + pop {r0}
> + msr cpsr,r0
> +
> + /*
> + * restore c1 register
> + * (especially set exception vector location back to
> + * bootrom space which is required by bootrom for USB boot)
> + */
> + pop {r0}
> + mcr p15, 0, r0, c1, c0, 0
> +
> pop {r0-r12,r14}
> bx lr

Yep, looks fine. Stefano, can you apply? Or shall I start hand-picking these
mx28 patches and then send you a pullrq?

Acked-by: Marek Vasut <marek.vasut@gmail.com>