From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 8 Feb 2012 03:43:03 +0100 Subject: [U-Boot] [PATCH 4/4 v4] Preventing needless switching on and off PLL bypass mode, allowing allow single-stepping through the SPL In-Reply-To: References: <1328620611-24108-1-git-send-email-robert@delien.nl> <201202071753.09412.marek.vasut@gmail.com> Message-ID: <201202080343.03708.marek.vasut@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > Hi Marek, > > On Tue, Feb 7, 2012 at 2:53 PM, Marek Vasut wrote: > >> From: Robert Delien > >> > >> This patch prevents the needless switching on and off of PLL bypass > >> mode. With this patch in place, single-stepping through the SPL is > >> now possible. > > > > Why did FSL have it in the bootlets though? Fabio, can you explain? > > Anson (in Cc) explained the following: > > "The switch of CPU clock is to make our EVK board can boot up the > uboot and kernel with less than 100mA power consumption to meet the > USB specification, because there is chance that the EVK board is power > by USB cable only, we need to make sure in this scenario, before USB > enum done, the total power consumption for our EVK board should be > less than 100mA, but if CPU running with PLL on, the power consumption > is > 100mA under uboot, so we need to disable PLL and switch CPU clock > to XTAL before USB enum done." > And by running off XTAL, the consumption grows so dramatically? M