From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marek.vasut@gmail.com>
Date: Wed, 8 Feb 2012 03:46:55 +0100
Subject: [U-Boot] [PATCH 4/4 v4] Preventing needless switching on and
	off PLL bypass mode, allowing allow single-stepping through the SPL
In-Reply-To: <F0D11DBEB504444BA6C8DA07A395A35A0438D1@039-SN2MPN1-012.039d.mgd.msft.net>
References: <1328620611-24108-1-git-send-email-robert@delien.nl>
	<201202080343.03708.marek.vasut@gmail.com>
	<F0D11DBEB504444BA6C8DA07A395A35A0438D1@039-SN2MPN1-012.039d.mgd.msft.net>
Message-ID: <201202080346.55219.marek.vasut@gmail.com>
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> That is because not only CPU running @ PLL, HBUS also source from P_CLK, we
> switch CPU clock to XTAL, the HBUS clock also slow down.

Ok, but you switch it back to PLL after the power supply was configured. And 
then the consumption grows back.

M
> 
> Best Regards.
> Anson huang ???
>  
> Freescale Semiconductor Shanghai
> ?????????192?C?2?
> 201203
> Tel:021-28937058
> 
> $-----Original Message-----
> $From: Marek Vasut [mailto:marek.vasut at gmail.com]
> $Sent: Wednesday, February 08, 2012 10:43 AM
> $To: Fabio Estevam
> $Cc: Huang Yongcai-B20788; robert at delien.nl; u-boot at lists.denx.de
> $Subject: Re: [PATCH 4/4 v4] Preventing needless switching on and off PLL
> bypass $mode, allowing allow single-stepping through the SPL
> $
> $> Hi Marek,
> $>
> $> On Tue, Feb 7, 2012 at 2:53 PM, Marek Vasut <marek.vasut@gmail.com>
> wrote: $> >> From: Robert Delien <robert@delien.nl>
> $> >>
> $> >> This patch prevents the needless switching on and off of PLL bypass
> $> >> mode. With this patch in place, single-stepping through the SPL is
> $> >> now possible.
> $> >
> $> > Why did FSL have it in the bootlets though? Fabio, can you explain?
> $>
> $> Anson (in Cc) explained the following:
> $>
> $> "The switch of CPU clock is to make our EVK board can boot up the
> $> uboot and kernel with less than 100mA power consumption to meet the
> $> USB specification, because there is chance that the EVK board is power
> $> by USB cable only, we need to make sure in this scenario, before USB
> $> enum done, the total power consumption for our EVK board should be
> $> less than 100mA, but if CPU running with PLL on, the power consumption
> $> is > 100mA under uboot, so we need to disable PLL and switch CPU clock
> $> to XTAL before USB enum done."
> $>
> $
> $And by running off XTAL, the consumption grows so dramatically?
> $
> $M