From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 9 Feb 2012 08:06:51 +0100 Subject: [U-Boot] i.MX5/6 U-Boot: Cache enabling In-Reply-To: <4F327A9B.6010005@de.bosch.com> References: <4F2B8BD1.2030009@de.bosch.com> <201202041118.55183.marek.vasut@gmail.com> <4F327A9B.6010005@de.bosch.com> Message-ID: <201202090806.51520.marek.vasut@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > On 04.02.2012 11:18, Marek Vasut wrote: > >> Let's discuss how to enable the i.MX5/6 caches in U-Boot: > >> > >> On 03.02.2012 12:00, Stefano Babic wrote: > >>> On 03/02/2012 11:18, Dirk Behme wrote: > >> ... > >> > >>>>> As your concerns are surely related to speed up the boot process, > >>>>> IMHO we can focus efforts to add cache support for MX5 / MX6. > >>>> > >>>> Ok, sounds good. Any idea what has to be done for this? Or what would > >>>> be the steps for this? > >>> > >>> As armv7 architecture, the MX can profit of the work already done for > >>> other SOCs. Functions for enabling / disabling / invalidate caches are > >>> already provided, in arch/arm/lib and arch/arm/cpu/armv7/cache_v7.c. So > >>> at least for MX5/MX6. > >>> > >>> But we should change MXC drivers to be cache-aware. At least the FEC > >>> driver and MMC driver are known to not work when dcache is on. > >> > >> Marek, Troy, Fabio: What do you think is needed to make the i.MX5/6 > >> FEC driver cache-aware? > > > > I already have a partly finished implementation of FEC ethernet with > > cache support somewhere on my drive. > > Do you like to share this? > > Many thanks and best regards Try the attached stuff, it's likely crap and needs rebasing. It might give you some pointers as of how to handle this. > > Dirk -------------- next part -------------- A non-text attachment was scrubbed... Name: 0045-FEC-Fix-to-work-with-data-cache-enabled.patch Type: text/x-patch Size: 14678 bytes Desc: not available URL: