From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sat, 3 Mar 2012 00:25:38 +0100 Subject: [U-Boot] [PATCH 1/4] i.MX6: define CACHELINE_SIZE In-Reply-To: <1330729572-12642-2-git-send-email-eric.nelson@boundarydevices.com> References: <1330729572-12642-1-git-send-email-eric.nelson@boundarydevices.com> <1330729572-12642-2-git-send-email-eric.nelson@boundarydevices.com> Message-ID: <201203030025.38857.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > --- > arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h > b/arch/arm/include/asm/arch-mx6/imx-regs.h index 6a200bb..3e5c4c2 100644 > --- a/arch/arm/include/asm/arch-mx6/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h > @@ -19,6 +19,8 @@ > #ifndef __ASM_ARCH_MX6_IMX_REGS_H__ > #define __ASM_ARCH_MX6_IMX_REGS_H__ > > +#define CONFIG_SYS_CACHELINE_SIZE 32 > + > #define ROMCP_ARB_BASE_ADDR 0x00000000 > #define ROMCP_ARB_END_ADDR 0x000FFFFF > #define CAAM_ARB_BASE_ADDR 0x00100000 Acked-by: Marek Vasut