From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Tue, 6 Mar 2012 01:36:29 +0100 Subject: [U-Boot] [PATCH v8] usb: align buffers at cacheline In-Reply-To: References: <4F54BEA9.6060302@boundarydevices.com> <1330958781-20863-1-git-send-email-puneets@nvidia.com> Message-ID: <201203060136.29617.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Simon Glass, > Hi Puneet, > > On Mon, Mar 5, 2012 at 6:46 AM, Puneet Saxena wrote: > > As DMA expects the buffers to be equal and larger then > > cache lines, This aligns buffers at cacheline. > > > > Signed-off-by: Puneet Saxena > > Tested on Seaboard: > > Tested-by: Simon Glass > Acked-by: Simon Glass > Guys, I'm very happy that we finally got it here. But the USB framework changed in mainline recently a bit (usb.c was split to usb.c and usb_hub.c). Puneet, can you please adapt your patch and do one last loop? Thanks in advance! Best regards, Marek Vasut