From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Fri, 30 Mar 2012 18:05:27 +0200 Subject: [U-Boot] [PATCH] ARM1136: add cache flush and invalidate operations In-Reply-To: <4F75D83B.5070505@denx.de> References: <1333116143-4625-1-git-send-email-agust@denx.de> <201203301728.03940.marex@denx.de> <4F75D83B.5070505@denx.de> Message-ID: <201203301805.27335.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Stefano Babic, > On 30/03/2012 17:28, Marek Vasut wrote: > >> However, Albert has sent a report > >> > >> http://www.mail-archive.com/u-boot at lists.denx.de/msg80566.html > >> > >> a none of these boards was broken. But I see now that other boards are > >> affected (the mx28evk does not compile due to missing CONFIG_APBH_DMA). > > > > Fabio, can you fix please? This is trivial. > > > >> Albert, are these patches part of your pull-request to Wolfgang ? > > > > I believe the pullRQ isn't cooked yet. The fix for this issue right now > > would be to merge a patch that implements blank dcache-management > > functions for arm1136 -- like is in AG's patch. So I'm all for merging > > AG's patch into AA's tree. > > I am testing Anatolij's patch on mx35pdk. > > TFTP from server 192.168.2.14; our IP address is 192.168.2.97 > Filename 'mx35pdk/uImage'. > Load address: 0x80800000 > Loading: Misaligned cache operation [8fe726e8, 8fe72728] > > However, data is correctly loaded. I will check mmc on the "flea" board. You get this from FEC? Will have to recheck, this is weird, will recheck once I get back to my m28. > > > It's a good thing this stirred a wave of response including patches. We > > now know very well which boards are maintained ;-) > > > > Also, once any such breaking patch lands into mainline, we'll know in > > _less_than_24_hours_ that something got broken. (this is handled by DENX > > CI machine). > > Well, this is a good thing - my worries are about that patches for imx > were already merged, and > > > Finally, we can't really run physical (HW) tests indeed, but did we ever > > run physical tests with each and every patch? > > Not every patch, but a patchset that can have influence on several SOCs, > yes. Agreed. > > > (and to conclude this -- these patches > > were tested on M28 and MX6Q-board) > > mmmh...I suppose the following patches must be merged, too (I had merged > into u-boot-next, really): > > Author: Eric Nelson > Date: Sun Mar 4 11:47:37 2012 +0000 > > i.MX6: define CACHELINE_SIZE > > and also even if not mandatory: > commit 1b2150b0770d8d019a41993d8692e4a29bf70a9e > Author: Eric Nelson > Date: Sun Mar 4 11:47:38 2012 +0000 > > i.MX6: implement enable_caches() > > disabled by default until drivers are fixed > > Signed-off-by: Eric Nelson > Acked-by: Marek Vasut They weren't already? Hm. > > Best regards, > Stefano Babic Best regards, Marek Vasut