From mboxrd@z Thu Jan  1 00:00:00 1970
From: Anatolij Gustschin <agust@denx.de>
Date: Mon, 30 Apr 2012 17:19:05 +0200
Subject: [U-Boot] [PATCH] video: cfb_console: flush dcache for frame
 buffer in DRAM
In-Reply-To: <201204300425.51019.marex@denx.de>
References: <1335625447-24189-1-git-send-email-agust@denx.de>
	<201204300425.51019.marex@denx.de>
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To: u-boot@lists.denx.de

Hi,

On Mon, 30 Apr 2012 04:25:50 +0200
Marek Vasut <marex@denx.de> wrote:
...
> > observed with cfb on beageboard and N900 when running with data
> > cache enabled.
> 
> beagleboard ;-)

Thanks for catching that!!

...
> > @@ -553,6 +557,8 @@ static void video_drawchars(int xx, int yy, unsigned
> > char *s, int count) SWAP32((video_font_draw_table32
> >  						[bits & 15][3] & eorx) ^ bgx);
> >  			}
> > +			if (cfb_do_flush_cache)
> > +				flush_cache((ulong)dest0, 32);
> 
> flush_dcache_range() ?

I would have to calculate the end address, then. flush_cache() already
does it for me :-)

...
> > @@ -1651,6 +1661,29 @@ static void *video_logo(void)
> >  }
> >  #endif
> > 
> > +static int cfb_fb_is_in_dram(void)
> > +{
> > +	bd_t *bd = gd->bd;
> > +	ulong start, end;
> > +	int i;
> > +
> > +	for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
> > +#if defined(CONFIG_ARM) || defined(CONFIG_AVR32) || defined(COFNIG_NDS32)
> > || \ +defined(CONFIG_SANDBOX) || defined(CONFIG_X86)
> > +		start = bd->bi_dram[i].start;
> > +		end = bd->bi_dram[i].start + bd->bi_dram[i].size - 1;
> > +#else
> > +		start = bd->bi_memstart;
> > +		end = bd->bi_memsize;
> > +#endif
> > +
> > +		if ((ulong)video_fb_address >= start &&
> > +		    (ulong)video_fb_address < end)
> > +			return 1;
> > +	}
> > +	return 0;
> > +}
> 
> Can't you have SRAM cached too? ;-)

I do not know. But who will put the framebuffer into SRAM?
It is not big enough.

Thanks,
Anatolij