From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 3 May 2012 16:41:10 +0200 Subject: [U-Boot] [PATCH 1/3] Revert "i.MX28: Enable additional DRAM address bits" In-Reply-To: References: <1335996878-2264-1-git-send-email-marex@denx.de> <201205031536.53380.marex@denx.de> Message-ID: <201205031641.10748.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Detlev Zundel, > Hi Marek, > > [...] > > >> - Why was the change made in the first place and for what OOT port? > > > > Change of a DRAM configuration register that enabled additional > > address bit, at address 512MB of DRAM. Though this caused memory hole > > on our M28 module with 256MB of DRAM, which _is_ mainline. X board is > > OOT and never will be mainlined I guess. > > I still do not understand this fully. What exactly is this "memory > hole" and why is it fatal? As far as I can remember, there are always > some holes in the adress map, so why is this special? No, this one created this layout on our 256 MB module: [chunk of memory][<- same thing][chunk of memory][<- same thing] so get_ram_size() didn't work with it and it actually overwrote part of the U- Boot etc. > > Apart from that, I think most of these answers should go into the commit > message to understand what is happening. Agreed > Thanks in advance > Detlev Best regards, Marek Vasut