[U-Boot] [PATCH 3/4 V2] i.MX28: Add delay after CPU bypass is cleared

[Marek Vasut <marex@denx.de>]

Dear Detlev Zundel,

> Hi Marek,
> 
> > This solves issues when larger amount of DRAM is used. Behave the
> > same in case of CPU bypass as we do in case of EMI bypass, wait
> > 15 ms. We need to wait until the clock domain stabilizes.
> 
> Sorry to be somewhat persistent here, but can you please include the
> information what "larger amount of DRAM" is that this delay works for?
> Also is this guessed, measured or calculated?

Pure guesswork. I have no scientific background for this.

> The reason why I am so persistent is that this is _available_
> information now and it will be very valuable information for the next
> person reading the code while pondering the question "ok, this worked in
> the past, but maybe it is a problem on my brand new hardware".

There is zero information available, I'll need to dig deeper ... Fabio, can you 
comment on this? Is this needed or is it some other problem?

> Thanks
>   Detlev

Best regards,
Marek Vasut