[U-Boot] [PATCH v5 0/5] Kirkwood: add lschlv2 and lsxhl board support

[U-Boot] [PATCH v5 0/5] Kirkwood: add lschlv2 and lsxhl board support

[Michael Walle]

Changes:
v5:
 - combine patchset again. the "net: *" patches should be individually
   acked by net custodian
 - make features configurable at compile time (CONFIG_RANDOM_MACADDR and
   CONFIG_SETENV_ENETADDR_BY_INDEX)
 - remove unused variable in boards/buffalo/lsxl.c
 - fix potential compiler warning "too many arguments for format"
 - new patch which fixes eth_getenv_enetaddr_by_index() and eth_mac_skip()
 - change initial seed of rand() to 1
 - enable CONFIG_API and CONFIG_CMD_ELF for lsxl boards

v4:
 - typo fixes (thanks Mike)
 - seed all 46bits of the generated ethernet address (suggested by Mike)
 - split patchset (generic net helpers and lsxl support)
 - fix typo in bootcmd_hdd
 - removed board/buffalo/lsxl/config.mk patch from patchset

v3:
 - add "Kirkwood:" prefix to patch subject
 - moved board/buffalo/lsxl/config.mk to an own patch, so it can be
   separately acked/naked ;)
 - removed any hardcoding, that is the mac address is now automatically
   generated (random, locally administered) and the IP settings are
   fetched with DHCP/BOOTP.
 - add detailed comments to every configuration line in kwbimage.cfg
 - add comments in MPP configuration about GPIO usage
 - removed lschlv2 ramboot
 - use short board ident string
 - small cleanups

v2:
 - add to buffalo vendor directory instead of Marvell
 - add both boards to MAINTAINERS
 - don't define values for feature macros
 - use tab for vertical alignment
 - remove static network configuration, instead introduce a rescue mode
 - add some convenience scripts
 - small cleanups

Michael Walle (5):
  lib: add rand() function
  net: add helper to generate random mac address
  net: fix potential compiler warning
  net: add eth_setenv_enetaddr_by_index()
  Kirkwood: add lschlv2 and lsxhl board support

 MAINTAINERS                           |    5 +
 board/buffalo/lsxl/Makefile           |   50 ++++++
 board/buffalo/lsxl/kwbimage-lschl.cfg |  229 +++++++++++++++++++++++++
 board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229 +++++++++++++++++++++++++
 board/buffalo/lsxl/lsxl.c             |  302 +++++++++++++++++++++++++++++++++
 board/buffalo/lsxl/lsxl.h             |   75 ++++++++
 boards.cfg                            |    2 +
 include/common.h                      |    6 +
 include/configs/lsxl.h                |  182 ++++++++++++++++++++
 include/net.h                         |   33 ++++
 lib/Makefile                          |    1 +
 lib/rand.c                            |   43 +++++
 net/eth.c                             |   51 ++++++-
 13 files changed, 1206 insertions(+), 2 deletions(-)
 create mode 100644 board/buffalo/lsxl/Makefile
 create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg
 create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg
 create mode 100644 board/buffalo/lsxl/lsxl.c
 create mode 100644 board/buffalo/lsxl/lsxl.h
 create mode 100644 include/configs/lsxl.h
 create mode 100644 lib/rand.c

-- 
1.7.2.5

[U-Boot] [PATCH v5 1/5] lib: add rand() function

[Michael Walle]

It's a PRNG using the simple and fast xorshift method.

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Wolfgang Denk <wd@denx.de>
---
 include/common.h |    6 ++++++
 lib/Makefile     |    1 +
 lib/rand.c       |   43 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 50 insertions(+), 0 deletions(-)
 create mode 100644 lib/rand.c

diff --git a/include/common.h b/include/common.h
index 4b5841e..a9cb62c 100644
--- a/include/common.h
+++ b/include/common.h
@@ -733,6 +733,12 @@ char *	strmhz(char *buf, unsigned long hz);
 /* lib/crc32.c */
 #include <u-boot/crc.h>
 
+/* lib/rand.c */
+#ifdef CONFIG_RANDOM_MACADDR
+void srand(unsigned int seed);
+unsigned int rand(void);
+#endif
+
 /* common/console.c */
 int	console_init_f(void);	/* Before relocation; uses the serial  stuff	*/
 int	console_init_r(void);	/* After  relocation; uses the console stuff	*/
diff --git a/lib/Makefile b/lib/Makefile
index a0fec60..74579f9 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -65,6 +65,7 @@ COBJS-y += string.o
 COBJS-y += time.o
 COBJS-$(CONFIG_BOOTP_PXE) += uuid.o
 COBJS-y += vsprintf.o
+COBJS-$(CONFIG_RANDOM_MACADDR) += rand.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
diff --git a/lib/rand.c b/lib/rand.c
new file mode 100644
index 0000000..6cb76ac
--- /dev/null
+++ b/lib/rand.c
@@ -0,0 +1,43 @@
+/*
+ * Simple xorshift PRNG
+ *   see http://www.jstatsoft.org/v08/i14/paper
+ *
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+static unsigned int y = 1U;
+
+void srand(unsigned int seed)
+{
+	y = seed;
+}
+
+unsigned int rand(void)
+{
+	y ^= (y << 13);
+	y ^= (y >> 17);
+	y ^= (y << 5);
+
+	return y;
+}
-- 
1.7.2.5

[U-Boot] [PATCH v5 1/5] lib: add rand() function

[Michael Walle]

Am Samstag 12 Mai 2012, 00:50:45 schrieb Michael Walle:
> It's a PRNG using the simple and fast xorshift method.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>
> Cc: Wolfgang Denk <wd@denx.de>


Hi Wolfgang,

can you ack this patch? In that case i could add the acked-by line in the next 
version of this patch series to ease the picking by Prafulla. All your 
previous comments should be addressed :)


> ---
>  include/common.h |    6 ++++++
>  lib/Makefile     |    1 +
>  lib/rand.c       |   43 +++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 50 insertions(+), 0 deletions(-)
>  create mode 100644 lib/rand.c
> 
> diff --git a/include/common.h b/include/common.h
> index 4b5841e..a9cb62c 100644
> --- a/include/common.h
> +++ b/include/common.h
> @@ -733,6 +733,12 @@ char *	strmhz(char *buf, unsigned long hz);
>  /* lib/crc32.c */
>  #include <u-boot/crc.h>
> 
> +/* lib/rand.c */
> +#ifdef CONFIG_RANDOM_MACADDR
> +void srand(unsigned int seed);
> +unsigned int rand(void);
> +#endif
> +
>  /* common/console.c */
>  int	console_init_f(void);	/* Before relocation; uses the serial  stuff	
*/
>  int	console_init_r(void);	/* After  relocation; uses the console stuff	
*/
> diff --git a/lib/Makefile b/lib/Makefile
> index a0fec60..74579f9 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -65,6 +65,7 @@ COBJS-y += string.o
>  COBJS-y += time.o
>  COBJS-$(CONFIG_BOOTP_PXE) += uuid.o
>  COBJS-y += vsprintf.o
> +COBJS-$(CONFIG_RANDOM_MACADDR) += rand.o
> 
>  COBJS	:= $(COBJS-y)
>  SRCS	:= $(COBJS:.o=.c)
> diff --git a/lib/rand.c b/lib/rand.c
> new file mode 100644
> index 0000000..6cb76ac
> --- /dev/null
> +++ b/lib/rand.c
> @@ -0,0 +1,43 @@
> +/*
> + * Simple xorshift PRNG
> + *   see http://www.jstatsoft.org/v08/i14/paper
> + *
> + * Copyright (c) 2012 Michael Walle
> + * Michael Walle <michael@walle.cc>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +
> +static unsigned int y = 1U;
> +
> +void srand(unsigned int seed)
> +{
> +	y = seed;
> +}
> +
> +unsigned int rand(void)
> +{
> +	y ^= (y << 13);
> +	y ^= (y >> 17);
> +	y ^= (y << 5);
> +
> +	return y;
> +}


-- 
Michael

[U-Boot] [PATCH v5 1/5] lib: add rand() function

[Prafulla Wadaskar]

> -----Original Message-----
> From: Michael Walle [mailto:michael at walle.cc]
> Sent: 23 May 2012 22:05
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar; Wolfgang Denk
> Subject: Re: [PATCH v5 1/5] lib: add rand() function
> 
> Am Samstag 12 Mai 2012, 00:50:45 schrieb Michael Walle:
> > It's a PRNG using the simple and fast xorshift method.
> >
> > Signed-off-by: Michael Walle <michael@walle.cc>
> > Cc: Wolfgang Denk <wd@denx.de>
> 
> 
> Hi Wolfgang,
> 
> can you ack this patch? In that case i could add the acked-by line in
> the next
> version of this patch series to ease the picking by Prafulla. All your
> previous comments should be addressed :)
> 
> 
> > ---
> >  include/common.h |    6 ++++++
> >  lib/Makefile     |    1 +
> >  lib/rand.c       |   43 +++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 50 insertions(+), 0 deletions(-)
> >  create mode 100644 lib/rand.c
> >

If I consider the files being checked in, those are generic, I would suggest if Wolfgang can pull them.

Regards..
Prafulla . . .

[U-Boot] [PATCH v5 1/5] lib: add rand() function

[Michael Walle]

On Thu, May 24, 2012 06:32, Prafulla Wadaskar wrote:
>> Hi Wolfgang,
>>
>> can you ack this patch? In that case i could add the acked-by line in
>> the next
>> version of this patch series to ease the picking by Prafulla. All your
>> previous comments should be addressed :)
>>
>>
>> > ---
>> >  include/common.h |    6 ++++++
>> >  lib/Makefile     |    1 +
>> >  lib/rand.c       |   43 +++++++++++++++++++++++++++++++++++++++++++
>> >  3 files changed, 50 insertions(+), 0 deletions(-)
>> >  create mode 100644 lib/rand.c
>> >
>
> If I consider the files being checked in, those are generic, I would
> suggest if Wolfgang can pull them.

Wolfgang won't pull this alone, see here:
  http://lists.denx.de/pipermail/u-boot/2012-May/124191.html
and here
  http://lists.denx.de/pipermail/u-boot/2012-May/124202.html

-- 
michael

[U-Boot] [PATCH v5 2/5] net: add helper to generate random mac address

[Michael Walle]

Add new function eth_random_enetaddr() to generate a locally administered
ethernet address.

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
---
 include/net.h |   17 +++++++++++++++++
 net/eth.c     |   22 ++++++++++++++++++++++
 2 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/include/net.h b/include/net.h
index ee11f82..f6aeba2 100644
--- a/include/net.h
+++ b/include/net.h
@@ -118,6 +118,23 @@ extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
 extern int eth_getenv_enetaddr_by_index(const char *base_name, int index,
 					uchar *enetaddr);
 
+#ifdef CONFIG_RANDOM_MACADDR
+/*
+ * The u-boot policy does not allow hardcoded ethernet addresses. Under the
+ * following circumstances a random generated address is allowed:
+ *  - in emergency cases, where you need a working network connection to set
+ *    the ethernet address.
+ *    Eg. you want a rescue boot and don't have a serial port to access the
+ *    CLI to set environment variables.
+ *
+ * In these cases, we generate a random locally administered ethernet address.
+ *
+ * Args:
+ *  enetaddr - returns 6 byte hardware address
+ */
+extern void eth_random_enetaddr(uchar *enetaddr);
+#endif
+
 extern int usb_eth_initialize(bd_t *bi);
 extern int eth_init(bd_t *bis);			/* Initialize the device */
 extern int eth_send(volatile void *packet, int length);	   /* Send a packet */
diff --git a/net/eth.c b/net/eth.c
index 3eeb908..c9f05d8 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -70,6 +70,28 @@ static int eth_mac_skip(int index)
 	return ((skip_state = getenv(enetvar)) != NULL);
 }
 
+#ifdef CONFIG_RANDOM_MACADDR
+void eth_random_enetaddr(uchar *enetaddr)
+{
+	uint32_t rval;
+
+	srand(get_timer(0));
+
+	rval = rand();
+	enetaddr[0] = rval & 0xff;
+	enetaddr[1] = (rval >> 8) & 0xff;
+	enetaddr[2] = (rval >> 16) & 0xff;
+
+	rval = rand();
+	enetaddr[3] = rval & 0xff;
+	enetaddr[4] = (rval >> 8) & 0xff;
+	enetaddr[5] = (rval >> 16) & 0xff;
+
+	/* make sure it's local and unicast */
+	enetaddr[0] = (enetaddr[0] | 0x02) & ~0x01;
+}
+#endif
+
 /*
  * CPU and board-specific Ethernet initializations.  Aliased function
  * signals caller to move on
-- 
1.7.2.5

[U-Boot] [PATCH v5 2/5] net: add helper to generate random mac address

[Joe Hershberger]

On Fri, May 11, 2012 at 5:50 PM, Michael Walle <michael@walle.cc> wrote:
> Add new function eth_random_enetaddr() to generate a locally administered
> ethernet address.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> Cc: Joe Hershberger <joe.hershberger@gmail.com>

Acked-by: Joe Hershberger <joe.hershberger@gmail.com>

[U-Boot] [PATCH v5 3/5] net: fix potential compiler warning

[Michael Walle]

Future compiler versions may generate a "too many arguments for functions"
warning.

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
---
 net/eth.c |   14 ++++++++++++--
 1 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/net/eth.c b/net/eth.c
index c9f05d8..afce863 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -58,7 +58,12 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index,
 				 uchar *enetaddr)
 {
 	char enetvar[32];
-	sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
+
+	if (index)
+		sprintf(enetvar, "%s%daddr", base_name, index);
+	else
+		sprintf(enetvar, "%saddr", base_name);
+
 	return eth_getenv_enetaddr(enetvar, enetaddr);
 }
 
@@ -66,7 +71,12 @@ static int eth_mac_skip(int index)
 {
 	char enetvar[15];
 	char *skip_state;
-	sprintf(enetvar, index ? "eth%dmacskip" : "ethmacskip", index);
+
+	if (index)
+		sprintf(enetvar, "eth%dmacskip", index);
+	else
+		sprintf(enetvar, "ethmacskip");
+
 	return ((skip_state = getenv(enetvar)) != NULL);
 }
 
-- 
1.7.2.5

[U-Boot] [PATCH v5 3/5] net: fix potential compiler warning

[Joe Hershberger]

Hi Michael,

On Fri, May 11, 2012 at 5:50 PM, Michael Walle <michael@walle.cc> wrote:
> Future compiler versions may generate a "too many arguments for functions"
> warning.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> Cc: Joe Hershberger <joe.hershberger@gmail.com>
> ---
> ?net/eth.c | ? 14 ++++++++++++--
> ?1 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/net/eth.c b/net/eth.c
> index c9f05d8..afce863 100644
> --- a/net/eth.c
> +++ b/net/eth.c
> @@ -58,7 +58,12 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? uchar *enetaddr)
> ?{
> ? ? ? ?char enetvar[32];
> - ? ? ? sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
> +
> + ? ? ? if (index)
> + ? ? ? ? ? ? ? sprintf(enetvar, "%s%daddr", base_name, index);
> + ? ? ? else
> + ? ? ? ? ? ? ? sprintf(enetvar, "%saddr", base_name);
> +
> ? ? ? ?return eth_getenv_enetaddr(enetvar, enetaddr);
> ?}
>
> @@ -66,7 +71,12 @@ static int eth_mac_skip(int index)
> ?{
> ? ? ? ?char enetvar[15];
> ? ? ? ?char *skip_state;
> - ? ? ? sprintf(enetvar, index ? "eth%dmacskip" : "ethmacskip", index);
> +
> + ? ? ? if (index)
> + ? ? ? ? ? ? ? sprintf(enetvar, "eth%dmacskip", index);
> + ? ? ? else
> + ? ? ? ? ? ? ? sprintf(enetvar, "ethmacskip");
> +
> ? ? ? ?return ((skip_state = getenv(enetvar)) != NULL);
> ?}

This seems like this could improve by consolidating the logic to come
up with the ethaddr variable name in an inline function.  Especially
since you are about to add another use in the setenv case.  Do you
agree, Mike?  Or is 3 uses of a relatively simple algorithm better
inlined than separated?

-Joe

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Michael Walle]

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
---
 include/net.h |   16 ++++++++++++++++
 net/eth.c     |   15 +++++++++++++++
 2 files changed, 31 insertions(+), 0 deletions(-)

diff --git a/include/net.h b/include/net.h
index f6aeba2..bdc3da6 100644
--- a/include/net.h
+++ b/include/net.h
@@ -104,7 +104,9 @@ extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
 extern int eth_get_dev_index (void);		/* get the device index */
 extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
 extern int eth_getenv_enetaddr(char *name, uchar *enetaddr);
+#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
 extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
+#endif
 
 /*
  * Get the hardware address for an ethernet interface .
@@ -118,6 +120,20 @@ extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
 extern int eth_getenv_enetaddr_by_index(const char *base_name, int index,
 					uchar *enetaddr);
 
+#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
+/*
+ * Set the hardware address for an ethernet interface .
+ * Args:
+ *	base_name - base name for device (normally "eth")
+ *	index - device index number (0 for first)
+ *	enetaddr - returns 6 byte hardware address
+ * Returns:
+ *	0 on success, else 1.
+ */
+extern int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+					const uchar *enetaddr);
+#endif
+
 #ifdef CONFIG_RANDOM_MACADDR
 /*
  * The u-boot policy does not allow hardcoded ethernet addresses. Under the
diff --git a/net/eth.c b/net/eth.c
index afce863..d66e22a 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -67,6 +67,21 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index,
 	return eth_getenv_enetaddr(enetvar, enetaddr);
 }
 
+#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
+int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+		const uchar *enetaddr)
+{
+	char enetvar[32];
+
+	if (index)
+		sprintf(enetvar, "%s%daddr", base_name, index);
+	else
+		sprintf(enetvar, "%saddr", base_name);
+
+	return eth_setenv_enetaddr(enetvar, enetaddr);
+}
+#endif
+
 static int eth_mac_skip(int index)
 {
 	char enetvar[15];
-- 
1.7.2.5

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Michael Walle]

Am Samstag 12 Mai 2012, 00:50:48 schrieb Michael Walle:
> Signed-off-by: Michael Walle <michael@walle.cc>
> Cc: Joe Hershberger <joe.hershberger@gmail.com>
> ---
>  include/net.h |   16 ++++++++++++++++
>  net/eth.c     |   15 +++++++++++++++
>  2 files changed, 31 insertions(+), 0 deletions(-)
> 
> diff --git a/include/net.h b/include/net.h
> index f6aeba2..bdc3da6 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -104,7 +104,9 @@ extern struct eth_device *eth_get_dev_by_index(int
> index); /* get dev @ index */ extern int eth_get_dev_index (void);		
/* get
> the device index */
>  extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
>  extern int eth_getenv_enetaddr(char *name, uchar *enetaddr);
> +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
>  extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
> +#endif

sorry, wrong function, will be corrected in next version.

--
michael

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Joe Hershberger]

Hi Michael,

On Fri, May 11, 2012 at 5:50 PM, Michael Walle <michael@walle.cc> wrote:
> Signed-off-by: Michael Walle <michael@walle.cc>
> Cc: Joe Hershberger <joe.hershberger@gmail.com>
> ---
> ?include/net.h | ? 16 ++++++++++++++++
> ?net/eth.c ? ? | ? 15 +++++++++++++++
> ?2 files changed, 31 insertions(+), 0 deletions(-)
>
> diff --git a/include/net.h b/include/net.h
> index f6aeba2..bdc3da6 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -104,7 +104,9 @@ extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
> ?extern int eth_get_dev_index (void); ? ? ? ? ? /* get the device index */
> ?extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
> ?extern int eth_getenv_enetaddr(char *name, uchar *enetaddr);
> +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
> ?extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
> +#endif

Which other function did you intend?  You already guarded the only
definition whose implementation is guarded.

> ?/*
> ?* Get the hardware address for an ethernet interface .
> @@ -118,6 +120,20 @@ extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
> ?extern int eth_getenv_enetaddr_by_index(const char *base_name, int index,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?uchar *enetaddr);
>
> +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX

Personally I don't like config options for something so tiny.  If you
really must guard against including it, use the CONFIG_RANDOM_MACADDR
instead.  I'd prefer to just let the linker exclude it when it's never
referenced.

> +/*
> + * Set the hardware address for an ethernet interface .
> + * Args:
> + * ? ? base_name - base name for device (normally "eth")
> + * ? ? index - device index number (0 for first)
> + * ? ? enetaddr - returns 6 byte hardware address
> + * Returns:
> + * ? ? 0 on success, else 1.
> + */
> +extern int eth_setenv_enetaddr_by_index(const char *base_name, int index,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? const uchar *enetaddr);
> +#endif
> +
> ?#ifdef CONFIG_RANDOM_MACADDR
> ?/*
> ?* The u-boot policy does not allow hardcoded ethernet addresses. Under the
> diff --git a/net/eth.c b/net/eth.c
> index afce863..d66e22a 100644
> --- a/net/eth.c
> +++ b/net/eth.c
> @@ -67,6 +67,21 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index,
> ? ? ? ?return eth_getenv_enetaddr(enetvar, enetaddr);
> ?}
>
> +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
> +int eth_setenv_enetaddr_by_index(const char *base_name, int index,
> + ? ? ? ? ? ? ? const uchar *enetaddr)
> +{
> + ? ? ? char enetvar[32];
> +
> + ? ? ? if (index)
> + ? ? ? ? ? ? ? sprintf(enetvar, "%s%daddr", base_name, index);
> + ? ? ? else
> + ? ? ? ? ? ? ? sprintf(enetvar, "%saddr", base_name);
> +
> + ? ? ? return eth_setenv_enetaddr(enetvar, enetaddr);
> +}
> +#endif

You should synchronize with Rob Herring who is also trying to add this
eth_setenv_enetaddr_by_index() function.
http://patchwork.ozlabs.org/patch/152590/

Also since Rob's patch would use this function all the time, the
CONFIG_SETENV_ENETADDR_BY_INDEX would be removed, right?

Thanks,
-Joe

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Michael Walle]

Hi Joe,

Am Mittwoch 16 Mai 2012, 02:56:39 schrieb Joe Hershberger:
> Hi Michael,
> 
> On Fri, May 11, 2012 at 5:50 PM, Michael Walle <michael@walle.cc> wrote:
> > Signed-off-by: Michael Walle <michael@walle.cc>
> > Cc: Joe Hershberger <joe.hershberger@gmail.com>
> > ---
> >  include/net.h |   16 ++++++++++++++++
> >  net/eth.c     |   15 +++++++++++++++
> >  2 files changed, 31 insertions(+), 0 deletions(-)
> > 
> > diff --git a/include/net.h b/include/net.h
> > index f6aeba2..bdc3da6 100644
> > --- a/include/net.h
> > +++ b/include/net.h
> > @@ -104,7 +104,9 @@ extern struct eth_device *eth_get_dev_by_index(int
> > index); /* get dev @ index */ extern int eth_get_dev_index (void);      
> >     /* get the device index */ extern void eth_parse_enetaddr(const char
> > *addr, uchar *enetaddr); extern int eth_getenv_enetaddr(char *name,
> > uchar *enetaddr);
> > +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
> >  extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
> > +#endif
> 
> Which other function did you intend?  You already guarded the only
> definition whose implementation is guarded.
That was a mistake. Will be fixed in the next version.

> >  /*
> >  * Get the hardware address for an ethernet interface .
> > @@ -118,6 +120,20 @@ extern int eth_setenv_enetaddr(char *name, const
> > uchar *enetaddr); extern int eth_getenv_enetaddr_by_index(const char
> > *base_name, int index, uchar *enetaddr);
> > 
> > +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
> 
> Personally I don't like config options for something so tiny.  If you
> really must guard against including it, use the CONFIG_RANDOM_MACADDR
> instead.
Me, too. But Wolfgang doesn't accept patches which increases the code size for 
other boards.

I don't think it is a good idea to use CONFIG_RANDOM_MACADDR for such a 
generic function, which will (hopefully) be used by others too.

> I'd prefer to just let the linker exclude it when it's never
> referenced.
Correct, me if i'm wrong, but the linker can only discard unused sections. But 
there was some discussion on -ffunction-sections and -fdata-sections on the 
ML. So maybe theres some light at the end of the tunnel ;)

> 
> > +/*
> > + * Set the hardware address for an ethernet interface .
> > + * Args:
> > + *     base_name - base name for device (normally "eth")
> > + *     index - device index number (0 for first)
> > + *     enetaddr - returns 6 byte hardware address
> > + * Returns:
> > + *     0 on success, else 1.
> > + */
> > +extern int eth_setenv_enetaddr_by_index(const char *base_name, int
> > index, +                                       const uchar *enetaddr);
> > +#endif
> > +
> >  #ifdef CONFIG_RANDOM_MACADDR
> >  /*
> >  * The u-boot policy does not allow hardcoded ethernet addresses. Under
> > the diff --git a/net/eth.c b/net/eth.c
> > index afce863..d66e22a 100644
> > --- a/net/eth.c
> > +++ b/net/eth.c
> > @@ -67,6 +67,21 @@ int eth_getenv_enetaddr_by_index(const char
> > *base_name, int index, return eth_getenv_enetaddr(enetvar, enetaddr);
> >  }
> > 
> > +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
> > +int eth_setenv_enetaddr_by_index(const char *base_name, int index,
> > +               const uchar *enetaddr)
> > +{
> > +       char enetvar[32];
> > +
> > +       if (index)
> > +               sprintf(enetvar, "%s%daddr", base_name, index);
> > +       else
> > +               sprintf(enetvar, "%saddr", base_name);
> > +
> > +       return eth_setenv_enetaddr(enetvar, enetaddr);
> > +}
> > +#endif
> 
> You should synchronize with Rob Herring who is also trying to add this
> eth_setenv_enetaddr_by_index() function.
> http://patchwork.ozlabs.org/patch/152590/
ah thanks for the hint.

> 
> Also since Rob's patch would use this function all the time, the
> CONFIG_SETENV_ENETADDR_BY_INDEX would be removed, right?
right, but see above.

-- 
Michael

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Joe Hershberger]

Hi Michael,

On Thu, May 17, 2012 at 3:43 PM, Michael Walle <michael@walle.cc> wrote:
>
> Hi Joe,
>
> Am Mittwoch 16 Mai 2012, 02:56:39 schrieb Joe Hershberger:
>> Hi Michael,
>>
>> On Fri, May 11, 2012 at 5:50 PM, Michael Walle <michael@walle.cc> wrote:
>> > Signed-off-by: Michael Walle <michael@walle.cc>
>> > Cc: Joe Hershberger <joe.hershberger@gmail.com>
>> > ----
>> > diff --git a/net/eth.c b/net/eth.c
>> > index afce863..d66e22a 100644
>> > --- a/net/eth.c
>> > +++ b/net/eth.c
>> > @@ -67,6 +67,21 @@ int eth_getenv_enetaddr_by_index(const char
>> > *base_name, int index, return eth_getenv_enetaddr(enetvar, enetaddr);
>> > ?}
>> >
>> > +#ifdef CONFIG_SETENV_ENETADDR_BY_INDEX
>> > +int eth_setenv_enetaddr_by_index(const char *base_name, int index,
>> > + ? ? ? ? ? ? ? const uchar *enetaddr)
>> > +{
>> > + ? ? ? char enetvar[32];
>> > +
>> > + ? ? ? if (index)
>> > + ? ? ? ? ? ? ? sprintf(enetvar, "%s%daddr", base_name, index);
>> > + ? ? ? else
>> > + ? ? ? ? ? ? ? sprintf(enetvar, "%saddr", base_name);
>> > +
>> > + ? ? ? return eth_setenv_enetaddr(enetvar, enetaddr);
>> > +}
>> > +#endif

How about something like this instead...

-----------8<-----------8<-----------8<-----------8<-----------

diff --git a/include/net.h b/include/net.h
index a092f29..5bc4b0d 100644
--- a/include/net.h
+++ b/include/net.h
@@ -600,6 +600,22 @@ static inline int is_broadcast_ether_addr(const u8 *addr)
 }

 /*
+ * Create a variable name for the ethernet address
+ *
+ * @param base_name Input string constant (typically "eth") prepended to name
+ * @param index Index to be added to the name if not 0
+ * @param ethaddr_var Output string variable name for MAC address
+ */
+static inline void eth_enetaddr_var_by_index(const char *base_name, int index,
+	char *ethaddr_var)
+{
+	if (index)
+		sprintf(ethaddr_var, "%s%daddr", base_name, index);
+	else
+		sprintf(ethaddr_var, "%saddr", base_name);
+}
+
+/*
  * is_valid_ether_addr - Determine if the given Ethernet address is valid
  * @addr: Pointer to a six-byte array containing the Ethernet address
  *
diff --git a/net/eth.c b/net/eth.c
index d9a6430..4b38bc4 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -58,7 +58,8 @@ int eth_getenv_enetaddr_by_index(const char
*base_name, int index,
 				 uchar *enetaddr)
 {
 	char enetvar[32];
-	sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
+
+	eth_enetaddr_var_by_index(base_name, index, enetvar);
 	return eth_getenv_enetaddr(enetvar, enetaddr);
 }

----------->8----------->8----------->8----------->8-----------

And then in your board support...

-----------8<-----------8<-----------8<-----------8<-----------

diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
new file mode 100644
index 0000000..603d11a
--- /dev/null
+++ b/board/buffalo/lsxl/lsxl.c
+...
+
+static void rescue_mode(void)
+{
+	uchar enetaddr[6];
+	char enetvar[32];
+
+	printf("Entering rescue mode..\n");
+	if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
+		eth_random_enetaddr(enetaddr);
+		eth_enetaddr_var_by_index("eth", 0, enetvar);
+		if (eth_setenv_enetaddr(enetvar, enetaddr)) {
+			printf("Failed to set ethernet address\n");
+				set_led(LED_ALARM_BLINKING);
+			return;
+		}
+	}
+	setenv("bootsource", "rescue");
+}
+

----------->8----------->8----------->8----------->8-----------

That way you aren't adding a function that noone else uses and you
don't need a silly guard around it.

Cheers,
-Joe

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Michael Walle]

Am Freitag 25 Mai 2012, 20:50:09 schrieb Joe Hershberger:
[..snip..]
> That way you aren't adding a function that noone else uses and you
> don't need a silly guard around it.

Hi Joe,

thanks for the review. I think i'll drop the dynamic "ethernet variable name" 
support entirely. Two reasons:
 - it isn't really dynamic, eg. the function always evaluates the name to
   "ethaddr"
 - back then when i wrote the support for the board the name was "eth1addr"
   and mike suggested to use the by index function for the getter and a new
   function for the setter. But i guess its not worth the hassle ;)

btw, imho your solution introduces a discrepancy between the setter and 
getter. i hope it doesnt bother you if i don't adapt your solution. But thanks 
for the work.

-- 
Michael

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Joe Hershberger]

Hi Michael,

On Fri, May 25, 2012 at 2:54 PM, Michael Walle <michael@walle.cc> wrote:
> Am Freitag 25 Mai 2012, 20:50:09 schrieb Joe Hershberger:
> [..snip..]
>> That way you aren't adding a function that noone else uses and you
>> don't need a silly guard around it.
>
> Hi Joe,
>
> thanks for the review. I think i'll drop the dynamic "ethernet variable name"
> support entirely. Two reasons:
> ?- it isn't really dynamic, eg. the function always evaluates the name to
> ? "ethaddr"
> ?- back then when i wrote the support for the board the name was "eth1addr"
> ? and mike suggested to use the by index function for the getter and a new
> ? function for the setter. But i guess its not worth the hassle ;)

OK.  Since it is specific to your board support anyway, that seems fine.

> btw, imho your solution introduces a discrepancy between the setter and
> getter.

It does, yes.  There is an inherent discrepancy, though, given that
one is used and the other is not.  I have no problem adding the
accessor if there are clients for it to justify its code space.

> i hope it doesnt bother you if i don't adapt your solution. But thanks
> for the work.

Not a problem at all.

-Joe

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Michael Walle]

Am Mittwoch 16 Mai 2012, 02:56:39 schrieb Joe Hershberger:
> You should synchronize with Rob Herring who is also trying to add this
> eth_setenv_enetaddr_by_index() function.
> http://patchwork.ozlabs.org/patch/152590/

Hi Rob,

Joe mentioned you have the same patch as me here:
  http://patchwork.ozlabs.org/patch/158624/

What is the current status of your patch?

Wolfgang had some comments on my patch:
  http://patchwork.ozlabs.org/patch/158354/

Could you incorporate these changes into your patch?

Unfortunately, i don't see a way to add the helper function without meeting 
Wolfgangs requirement not to increase the binary file for other boards. Unless 
gc-sections and function-sections are used on ARM, or adding an CONFIG_XX 
macro to mask the helper on compile time.

-- 
Michael

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Rob Herring]

On 05/22/2012 04:18 PM, Michael Walle wrote:
> Am Mittwoch 16 Mai 2012, 02:56:39 schrieb Joe Hershberger:
>> You should synchronize with Rob Herring who is also trying to add this
>> eth_setenv_enetaddr_by_index() function.
>> http://patchwork.ozlabs.org/patch/152590/
> 
> Hi Rob,
> 
> Joe mentioned you have the same patch as me here:
>   http://patchwork.ozlabs.org/patch/158624/
> 
> What is the current status of your patch?

I have no idea. It's been in the patch system for a month, gotten no
comments, and delegated to jhersh.

> Wolfgang had some comments on my patch:
>   http://patchwork.ozlabs.org/patch/158354/
> 
> Could you incorporate these changes into your patch?
> 
> Unfortunately, i don't see a way to add the helper function without meeting 
> Wolfgangs requirement not to increase the binary file for other boards. Unless 
> gc-sections and function-sections are used on ARM, or adding an CONFIG_XX 
> macro to mask the helper on compile time.

There was a patch series for gc-sections recently...

I don't see a way to meet this impossible requirement either, and I
don't really have the bandwidth right now.

Rob

[U-Boot] [PATCH v5 4/5] net: add eth_setenv_enetaddr_by_index()

[Michael Walle]

Am Dienstag 22 Mai 2012, 23:41:55 schrieb Rob Herring:
> On 05/22/2012 04:18 PM, Michael Walle wrote:
> > Am Mittwoch 16 Mai 2012, 02:56:39 schrieb Joe Hershberger:
> >> You should synchronize with Rob Herring who is also trying to add this
> >> eth_setenv_enetaddr_by_index() function.
> >> http://patchwork.ozlabs.org/patch/152590/
> > 
> > Hi Rob,
> > 
> > Joe mentioned you have the same patch as me here:
> >   http://patchwork.ozlabs.org/patch/158624/
> > 
> > What is the current status of your patch?
> 
> I have no idea. It's been in the patch system for a month, gotten no
> comments, and delegated to jhersh.
> 
> > Wolfgang had some comments on my patch:
> >   http://patchwork.ozlabs.org/patch/158354/
> > 
> > Could you incorporate these changes into your patch?
> > 
> > Unfortunately, i don't see a way to add the helper function without
> > meeting Wolfgangs requirement not to increase the binary file for other
> > boards. Unless gc-sections and function-sections are used on ARM, or
> > adding an CONFIG_XX macro to mask the helper on compile time.
> 
> There was a patch series for gc-sections recently...
yeah saw that too, but someone mentioned there were problems on arm, iirc.

> I don't see a way to meet this impossible requirement either, and I
> don't really have the bandwidth right now.

ok, thanks for the clarification :)

-- 
Michael

[U-Boot] [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support

[Michael Walle]

This patch adds support for both the Linkstation Live (LS-CHLv2) and
Linkstation Pro (LS-XHL) by Buffalo.

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 MAINTAINERS                           |    5 +
 board/buffalo/lsxl/Makefile           |   50 ++++++
 board/buffalo/lsxl/kwbimage-lschl.cfg |  229 +++++++++++++++++++++++++
 board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229 +++++++++++++++++++++++++
 board/buffalo/lsxl/lsxl.c             |  302 +++++++++++++++++++++++++++++++++
 board/buffalo/lsxl/lsxl.h             |   75 ++++++++
 boards.cfg                            |    2 +
 include/configs/lsxl.h                |  182 ++++++++++++++++++++
 8 files changed, 1074 insertions(+), 0 deletions(-)
 create mode 100644 board/buffalo/lsxl/Makefile
 create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg
 create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg
 create mode 100644 board/buffalo/lsxl/lsxl.c
 create mode 100644 board/buffalo/lsxl/lsxl.h
 create mode 100644 include/configs/lsxl.h

diff --git a/MAINTAINERS b/MAINTAINERS
index e2441d8..929ba6f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -894,6 +894,11 @@ Prafulla Wadaskar <prafulla@marvell.com>
 	rd6281a		ARM926EJS (Kirkwood SoC)
 	sheevaplug	ARM926EJS (Kirkwood SoC)
 
+Michael Walle <michael@walle.cc>
+
+	lschlv2		ARM926EJS (Kirkwood SoC)
+	lsxhl		ARM926EJS (Kirkwood SoC)
+
 Tom Warren <twarren@nvidia.com>
 
 	harmony		Tegra2 (ARM7 & A9 Dual Core)
diff --git a/board/buffalo/lsxl/Makefile b/board/buffalo/lsxl/Makefile
new file mode 100644
index 0000000..d06c882
--- /dev/null
+++ b/board/buffalo/lsxl/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (c) 2012 Michael Walle
+# Michael Walle <michael@walle.cc>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= lsxl.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/buffalo/lsxl/kwbimage-lschl.cfg b/board/buffalo/lsxl/kwbimage-lschl.cfg
new file mode 100644
index 0000000..2b9b3cd
--- /dev/null
+++ b/board/buffalo/lsxl/kwbimage-lschl.cfg
@@ -0,0 +1,229 @@
+#
+# Copyright (c) 2012 Michael Walle
+# Michael Walle <michael@walle.cc>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100E0 0x1B1B1B9B
+
+# L2 RAM Timing 0
+DATA 0xFFD20134 0xBBBBBBBB
+# not further specified in HW manual, timing taken from original vendor port
+
+# L2 RAM Timing 1
+DATA 0xFFD20138 0x00BBBBBB
+# not further specified in HW manual, timing taken from original vendor port
+
+# DDR Configuration register
+DATA 0xFFD01400 0x43000618
+# bit13-0:  0x618, 1560 DDR2 clks refresh rate
+# bit23-14: 0 required
+# bit24:    1, enable exit self refresh mode on DDR access
+# bit25:    1 required
+# bit29-26: 0 required
+# bit31-30: 0b01 required
+
+# DDR Controller Control Low
+DATA 0xFFD01404 0x39543000
+# bit3-0:   0 required
+# bit4:     0, addr/cmd in same cycle
+# bit5:     0, clk is driven during self refresh, we don't care for APX
+# bit6:     0, use recommended falling edge of clk for addr/cmd
+# bit11-7:  0 required
+# bit12:    1 required
+# bit13:    1 required
+# bit14:    0, input buffer always powered up
+# bit17-15: 0 required
+# bit18:    1, cpu lock transaction enabled
+# bit19:    0 required
+# bit23-20: 5, recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 9, CL+4, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31:    0, no additional STARTBURST delay
+
+# DDR Timing (Low)
+DATA 0xFFD01408 0x3302444F
+# bit3-0:   0xf, 16 cycle tRAS (tRAS[3-0])
+# bit7-4:   4, 5 cycle tRCD
+# bit11-8:  4, 5 cyle tRP
+# bit15-12: 4, 5 cyle tWR
+# bit19-16: 2, 3 cyle tWTR
+# bit20:    0, 16 cycle tRAS (tRAS[4])
+# bit23-21: 0 required
+# bit27-24: 3, 4 cycle tRRD
+# bit31-28: 3, 4 cyle tRTP
+
+# DDR Timing (High)
+DATA 0xFFD0140C 0x00000823
+# bit6-0:   0x23, 35 cycle tRFC
+# bit8-7:   0, 1 cycle tR2R
+# bit10-9:  0, 1 cyle tR2W
+# bit12-11: 1, 2 cylce tW2W
+# bit31-13: 0 required
+
+# DDR Address Control
+DATA 0xFFD01410 0x00000009
+# bit1-0:   1, Cs0width=x16
+# bit3-2:   2, Cs0size=512Mbit
+# bit5-4:   0, Cs1width=nonexistent
+# bit7-6:   0, Cs1size=nonexistent
+# bit9-8:   0, Cs2width=nonexistent
+# bit11-10: 0, Cs2size=nonexistent
+# bit13-12: 0, Cs3width=nonexistent
+# bit15-14: 0, Cs3size=nonexistent
+# bit16:    0, Cs0AddrSel
+# bit17:    0, Cs1AddrSel
+# bit18:    0, Cs2AddrSel
+# bit19:    0, Cs3AddrSel
+# bit31-20: 0 required
+
+# DDR Open Pages Control
+DATA 0xFFD01414 0x00000000
+# bit0:    0, OPEn=OpenPage enabled
+# bit31-1: 0 required
+
+# DDR Operation
+DATA 0xFFD01418 0x00000000
+# bit3-0:   0, Cmd=Normal SDRAM Mode
+# bit31-4:  0 required
+
+# DDR Mode
+DATA 0xFFD0141C 0x00000652
+# bit2-0:   2, Burst Length (2 required)
+# bit3:     0, Burst Type (0 required)
+# bit6-4:   5, CAS Latency (CL) 5
+# bit7:     0, (Test Mode) Normal operation
+# bit8:     0, (Reset DLL) Normal operation
+# bit11-9:  3, Write recovery for auto-precharge (3 required)
+# bit12:    0, Fast Active power down exit time (0 required)
+# bit31-13: 0 required
+
+# DDR Extended Mode
+DATA 0xFFD01420 0x00000042
+# bit0:     0, DRAM DLL enabled
+# bit1:     1, DRAM drive strength reduced
+# bit2:     0, ODT control Rtt[0] (Rtt=2, 150 ohm termination)
+# bit5-3:   0 required
+# bit6:     1, ODT control Rtt[1] (Rtt=2, 150 ohm termination)
+# bit9-7:   0 required
+# bit10:    0, differential DQS enabled
+# bit11:    0 required
+# bit12:    0, DRAM output buffer enabled
+# bit31-13: 0 required
+
+# DDR Controller Control High
+DATA 0xFFD01424 0x0000F17F
+# bit2-0:   0x7 required
+# bit3:     1, MBUS Burst Chop disabled
+# bit6-4:   0x7 required
+# bit7:     0 required (???)
+# bit8:     1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9:     0, no half clock cycle addition to dataout
+# bit10:    0, 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11:    0, 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 0xf required
+# bit31-16: 0 required
+
+# DDR2 ODT Read Timing (default values)
+DATA 0xFFD01428 0x00085520
+# bit3-0:   0 required
+# bit7-4:   2, 2 cycles from read command to assertion of M_ODT signal
+# bit11-8:  5, 5 cycles from read command to de-assertion of M_ODT signal
+# bit15-12: 5, 5 cycles from read command to assertion of internal ODT signal
+# bit19-16: 8, 8 cycles from read command to de-assertion of internal ODT signal
+# bit31-20: 0 required
+
+# DDR2 ODT Write Timing (default values)
+DATA 0xFFD0147C 0x00008552
+# bit3-0:   2, 2 cycles from write comand to assertion of M_ODT signal
+# bit7-4:   5, 5 cycles from write command to de-assertion of M_ODT signal
+# bit15-12: 5, 5 cycles from write command to assertion of internal ODT signal
+# bit19-16: 8, 8 cycles from write command to de-assertion of internal ODT signal
+# bit31-16: 0 required
+
+# CS[0]n Base address
+DATA 0xFFD01500 0x00000000
+# at 0x0
+
+# CS[0]n Size
+DATA 0xFFD01504 0x03FFFFF1
+# bit0:     1, Window enabled
+# bit1:     0, Write Protect disabled
+# bit3-2:   0x0, CS0 hit selected
+# bit23-4:  0xfffff required
+# bit31-24: 0x03, Size (i.e. 64MB)
+
+# CS[1]n Size
+DATA 0xFFD0150C 0x00000000
+# window disabled
+
+# CS[2]n Size
+DATA 0xFFD01514 0x00000000
+# window disabled
+
+# CS[3]n Size
+DATA 0xFFD0151C 0x00000000
+# window disabled
+
+# DDR ODT Control (Low)
+DATA 0xFFD01494 0x003C0000
+# bit3-0:   0b0000, (read) M_ODT[0] is not asserted during read from DRAM
+# bit7-4:   0b0000, (read) M_ODT[1] is not asserted during read from DRAM
+# bit15-8:  0 required
+# bit19-16: 0b1100, (write) M_ODT[0] is asserted during write to DRAM CS2, CS3
+# bit23-20: 0b0011, (write) M_ODT[1] is asserted during write to DRAM CS0, CS1
+# bit31-24: 0 required
+
+# DDR ODT Control (High)
+DATA 0xFFD01498 0x00000000
+# bit1-0:   0, M_ODT[0] assertion is controlled by ODT Control Low register
+# bit3-2:   0, M_ODT[1] assertion is controlled by ODT Control Low register
+# bit31-4   0 required
+
+# CPU ODT Control
+DATA 0xFFD0149C 0x0000E80F
+# bit3-0:   0b1111, internal ODT is asserted during read from DRAM bank 0-3
+# bit7-4:   0b0000, internal ODT is not asserted during write to DRAM bank 0-3
+# bit9-8:   0, Internal ODT assertion is controlled by fiels
+# bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
+# bit13-12: 2, M_STARTBURST_IN I/O buffer ODT 75 ohm
+# bit14:    1, M_STARTBURST_IN ODT enabled
+# bit15:    1, DDR IO ODT Unit: Drive ODT calibration values
+# bit20-16: 0, Pad N channel driving strength for ODT
+# bit25-21: 0, Pad P channel driving strength for ODT
+# bit31-26: 0 required
+
+# DDR Initialization Control
+DATA 0xFFD01480 0x00000001
+# bit0:     1, enable DDR init upon this register write
+# bit31-1:  0, required
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/board/buffalo/lsxl/kwbimage-lsxhl.cfg b/board/buffalo/lsxl/kwbimage-lsxhl.cfg
new file mode 100644
index 0000000..8a94b6c
--- /dev/null
+++ b/board/buffalo/lsxl/kwbimage-lsxhl.cfg
@@ -0,0 +1,229 @@
+#
+# Copyright (c) 2012 Michael Walle
+# Michael Walle <michael@walle.cc>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100E0 0x1B1B9B9B
+
+# L2 RAM Timing 0
+DATA 0xFFD20134 0xBBBBBBBB
+# not further specified in HW manual, timing taken from original vendor port
+
+# L2 RAM Timing 1
+DATA 0xFFD20138 0x00BBBBBB
+# not further specified in HW manual, timing taken from original vendor port
+
+# DDR Configuration register
+DATA 0xFFD01400 0x43000618
+# bit13-0:  0x618, 1560 DDR2 clks refresh rate
+# bit23-14: 0 required
+# bit24:    1, enable exit self refresh mode on DDR access
+# bit25:    1 required
+# bit29-26: 0 required
+# bit31-30: 0b01 required
+
+# DDR Controller Control Low
+DATA 0xFFD01404 0x39543010
+# bit3-0:   0 required
+# bit4:     1, T2 mode, addr/cmd are driven for two cycles
+# bit5:     0, clk is driven during self refresh, we don't care for APX
+# bit6:     0, use recommended falling edge of clk for addr/cmd
+# bit11-7:  0 required
+# bit12:    1 required
+# bit13:    1 required
+# bit14:    0, input buffer always powered up
+# bit17-15: 0 required
+# bit18:    1, cpu lock transaction enabled
+# bit19:    0 required
+# bit23-20: 5, recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 9, CL+4, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31:    0, no additional STARTBURST delay
+
+# DDR Timing (Low)
+DATA 0xFFD01408 0x22125441
+# bit3-0:   0x1, 18 cycle tRAS (tRAS[3-0])
+# bit7-4:   4, 5 cycle tRCD
+# bit11-8:  4, 5 cyle tRP
+# bit15-12: 5, 6 cyle tWR
+# bit19-16: 2, 3 cyle tWTR
+# bit20:    1, 18 cycle tRAS (tRAS[4])
+# bit23-21: 0 required
+# bit27-24: 2, 3 cycle tRRD
+# bit31-28: 2, 3 cyle tRTP
+
+# DDR Timing (High)
+DATA 0xFFD0140C 0x00000832
+# bit6-0:   0x32, 50 cycle tRFC
+# bit8-7:   0, 1 cycle tR2R
+# bit10-9:  0, 1 cyle tR2W
+# bit12-11: 1, 2 cylce tW2W
+# bit31-13: 0 required
+
+# DDR Address Control
+DATA 0xFFD01410 0x0000000C
+# bit1-0:   0, Cs0width=x8
+# bit3-2:   3, Cs0size=1Gbit
+# bit5-4:   0, Cs1width=nonexistent
+# bit7-6:   0, Cs1size=nonexistent
+# bit9-8:   0, Cs2width=nonexistent
+# bit11-10: 0, Cs2size=nonexistent
+# bit13-12: 0, Cs3width=nonexistent
+# bit15-14: 0, Cs3size=nonexistent
+# bit16:    0, Cs0AddrSel
+# bit17:    0, Cs1AddrSel
+# bit18:    0, Cs2AddrSel
+# bit19:    0, Cs3AddrSel
+# bit31-20: 0 required
+
+# DDR Open Pages Control
+DATA 0xFFD01414 0x00000000
+# bit0:    0, OPEn=OpenPage enabled
+# bit31-1: 0 required
+
+# DDR Operation
+DATA 0xFFD01418 0x00000000
+# bit3-0:   0, Cmd=Normal SDRAM Mode
+# bit31-4:  0 required
+
+# DDR Mode
+DATA 0xFFD0141C 0x00000652
+# bit2-0:   2, Burst Length (2 required)
+# bit3:     0, Burst Type (0 required)
+# bit6-4:   5, CAS Latency (CL) 5
+# bit7:     0, (Test Mode) Normal operation
+# bit8:     0, (Reset DLL) Normal operation
+# bit11-9:  3, Write recovery for auto-precharge (3 required)
+# bit12:    0, Fast Active power down exit time (0 required)
+# bit31-13: 0 required
+
+# DDR Extended Mode
+DATA 0xFFD01420 0x00000006
+# bit0:     0, DRAM DLL enabled
+# bit1:     1, DRAM drive strength reduced
+# bit2:     1, ODT control Rtt[0] (Rtt=1, 75 ohm termination)
+# bit5-3:   0 required
+# bit6:     0, ODT control Rtt[1] (Rtt=1, 75 ohm termination)
+# bit9-7:   0 required
+# bit10:    0, differential DQS enabled
+# bit11:    0 required
+# bit12:    0, DRAM output buffer enabled
+# bit31-13: 0 required
+
+# DDR Controller Control High
+DATA 0xFFD01424 0x0000F17F
+# bit2-0:   0x7 required
+# bit3:     1, MBUS Burst Chop disabled
+# bit6-4:   0x7 required
+# bit7:     0 required (???)
+# bit8:     1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9:     0, no half clock cycle addition to dataout
+# bit10:    0, 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11:    0, 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 0xf required
+# bit31-16: 0 required
+
+# DDR2 ODT Read Timing (default values)
+DATA 0xFFD01428 0x00085520
+# bit3-0:   0 required
+# bit7-4:   2, 2 cycles from read command to assertion of M_ODT signal
+# bit11-8:  5, 5 cycles from read command to de-assertion of M_ODT signal
+# bit15-12: 5, 5 cycles from read command to assertion of internal ODT signal
+# bit19-16: 8, 8 cycles from read command to de-assertion of internal ODT signal
+# bit31-20: 0 required
+
+# DDR2 ODT Write Timing (default values)
+DATA 0xFFD0147C 0x00008552
+# bit3-0:   2, 2 cycles from write comand to assertion of M_ODT signal
+# bit7-4:   5, 5 cycles from write command to de-assertion of M_ODT signal
+# bit15-12: 5, 5 cycles from write command to assertion of internal ODT signal
+# bit19-16: 8, 8 cycles from write command to de-assertion of internal ODT signal
+# bit31-16: 0 required
+
+# CS[0]n Base address
+DATA 0xFFD01500 0x00000000
+# at 0x0
+
+# CS[0]n Size
+DATA 0xFFD01504 0x0FFFFFF1
+# bit0:     1, Window enabled
+# bit1:     0, Write Protect disabled
+# bit3-2:   0x0, CS0 hit selected
+# bit23-4:  0xfffff required
+# bit31-24: 0x0f, Size (i.e. 256MB)
+
+# CS[1]n Size
+DATA 0xFFD0150C 0x00000000
+# window disabled
+
+# CS[2]n Size
+DATA 0xFFD01514 0x00000000
+# window disabled
+
+# CS[3]n Size
+DATA 0xFFD0151C 0x00000000
+# window disabled
+
+# DDR ODT Control (Low)
+DATA 0xFFD01494 0x00010000
+# bit3-0:   0b0000, (read) M_ODT[0] is not asserted during read from DRAM
+# bit7-4:   0b0000, (read) M_ODT[1] is not asserted during read from DRAM
+# bit15-8:  0 required
+# bit19-16: 0b0001, (write) M_ODT[0] is asserted during write to DRAM CS0
+# bit23-20: 0b0000, (write) M_ODT[1] is not asserted during write to DRAM
+# bit31-24: 0 required
+
+# DDR ODT Control (High)
+DATA 0xFFD01498 0x00000000
+# bit1-0:   0, M_ODT[0] assertion is controlled by ODT Control Low register
+# bit3-2:   0, M_ODT[1] assertion is controlled by ODT Control Low register
+# bit31-4   0 required
+
+# CPU ODT Control
+DATA 0xFFD0149C 0x0000E80F
+# bit3-0:   0b1111, internal ODT is asserted during read from DRAM bank 0-3
+# bit7-4:   0b0000, internal ODT is not asserted during write to DRAM bank 0-3
+# bit9-8:   0, Internal ODT assertion is controlled by fiels
+# bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
+# bit13-12: 2, M_STARTBURST_IN I/O buffer ODT 75 ohm
+# bit14:    1, M_STARTBURST_IN ODT enabled
+# bit15:    1, DDR IO ODT Unit: Drive ODT calibration values
+# bit20-16: 0, Pad N channel driving strength for ODT
+# bit25-21: 0, Pad P channel driving strength for ODT
+# bit31-26: 0 required
+
+# DDR Initialization Control
+DATA 0xFFD01480 0x00000001
+# bit0:     1, enable DDR init upon this register write
+# bit31-1:  0, required
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
new file mode 100644
index 0000000..603d11a
--- /dev/null
+++ b/board/buffalo/lsxl/lsxl.c
@@ -0,0 +1,302 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * Based on sheevaplug/sheevaplug.c by
+ *   Marvell Semiconductor <www.marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <net.h>
+#include <malloc.h>
+#include <netdev.h>
+#include <miiphy.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/mpp.h>
+#include <asm/arch/gpio.h>
+#include <spi_flash.h>
+
+#include "lsxl.h"
+
+/*
+ * Rescue mode
+ *
+ * Selected by holding the push button for 3 seconds, while powering on
+ * the device.
+ *
+ * These linkstations don't have a (populated) serial port. There is no
+ * way to access an (unmodified) board other than using the netconsole. If
+ * you want to recover from a bad environment setting or an empty environment,
+ * you can do this only with a working network connection. Therefore, a random
+ * ethernet address is generated if none is set and a DHCP request is sent.
+ * After a successful DHCP response is received, the network settings are
+ * configured and the ncip parameter is set to the serverip. Eg. for a working
+ * resuce mode, you should set 'next-server' to the host where the netconsole
+ * client is started.
+ * Additionally, the bootsource is set to 'cli'.
+ */
+
+#ifndef CONFIG_ENV_OVERWRITE
+# error "You need to set CONFIG_ENV_OVERWRITE"
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+	/*
+	 * default gpio configuration
+	 * There are maximum 64 gpios controlled through 2 sets of registers
+	 * the below configuration configures mainly initial LED status
+	 */
+	kw_config_gpio(LSXL_OE_VAL_LOW,
+			LSXL_OE_VAL_HIGH,
+			LSXL_OE_LOW, LSXL_OE_HIGH);
+
+	/*
+	 * Multi-Purpose Pins Functionality configuration
+	 * These strappings are taken from the original vendor uboot port.
+	 */
+	u32 kwmpp_config[] = {
+		MPP0_SPI_SCn,
+		MPP1_SPI_MOSI,
+		MPP2_SPI_SCK,
+		MPP3_SPI_MISO,
+		MPP4_UART0_RXD,
+		MPP5_UART0_TXD,
+		MPP6_SYSRST_OUTn,
+		MPP7_GPO,
+		MPP8_GPIO,
+		MPP9_GPIO,
+		MPP10_GPO,		/* HDD power */
+		MPP11_GPIO,		/* USB Vbus enable */
+		MPP12_SD_CLK,
+		MPP13_SD_CMD,
+		MPP14_SD_D0,
+		MPP15_SD_D1,
+		MPP16_SD_D2,
+		MPP17_SD_D3,
+		MPP18_GPO,		/* fan speed high */
+		MPP19_GPO,		/* fan speed low */
+		MPP20_GE1_0,
+		MPP21_GE1_1,
+		MPP22_GE1_2,
+		MPP23_GE1_3,
+		MPP24_GE1_4,
+		MPP25_GE1_5,
+		MPP26_GE1_6,
+		MPP27_GE1_7,
+		MPP28_GPIO,
+		MPP29_GPIO,
+		MPP30_GE1_10,
+		MPP31_GE1_11,
+		MPP32_GE1_12,
+		MPP33_GE1_13,
+		MPP34_GPIO,
+		MPP35_GPIO,
+		MPP36_GPIO,		/* function LED */
+		MPP37_GPIO,		/* alarm LED */
+		MPP38_GPIO,		/* info LED */
+		MPP39_GPIO,		/* power LED */
+		MPP40_GPIO,		/* fan alarm */
+		MPP41_GPIO,		/* funtion button */
+		MPP42_GPIO,		/* power switch */
+		MPP43_GPIO,		/* power auto switch */
+		MPP44_GPIO,
+		MPP45_GPIO,
+		MPP46_GPIO,
+		MPP47_GPIO,
+		MPP48_GPIO,		/* function red LED */
+		MPP49_GPIO,
+		0
+	};
+
+	kirkwood_mpp_conf(kwmpp_config);
+
+	return 0;
+}
+
+#define LED_OFF             0
+#define LED_ALARM_ON        1
+#define LED_ALARM_BLINKING  2
+#define LED_POWER_ON        3
+#define LED_POWER_BLINKING  4
+#define LED_INFO_ON         5
+#define LED_INFO_BLINKING   6
+
+static void __set_led(int blink_alarm, int blink_info, int blink_power,
+		int value_alarm, int value_info, int value_power)
+{
+	kw_gpio_set_blink(GPIO_ALARM_LED, blink_alarm);
+	kw_gpio_set_blink(GPIO_INFO_LED, blink_info);
+	kw_gpio_set_blink(GPIO_POWER_LED, blink_power);
+	kw_gpio_set_value(GPIO_ALARM_LED, value_alarm);
+	kw_gpio_set_value(GPIO_INFO_LED, value_info);
+	kw_gpio_set_value(GPIO_POWER_LED, value_power);
+}
+
+static void set_led(int state)
+{
+	switch (state) {
+	case LED_OFF:
+		__set_led(0, 0, 0, 0, 0, 0);
+		break;
+	case LED_ALARM_ON:
+		__set_led(0, 0, 0, 0, 1, 1);
+		break;
+	case LED_ALARM_BLINKING:
+		__set_led(1, 0, 0, 1, 1, 1);
+		break;
+	case LED_INFO_ON:
+		__set_led(0, 0, 0, 1, 0, 1);
+		break;
+	case LED_INFO_BLINKING:
+		__set_led(0, 1, 0, 1, 1, 1);
+		break;
+	case LED_POWER_ON:
+		__set_led(0, 0, 0, 1, 1, 0);
+		break;
+	case LED_POWER_BLINKING:
+		__set_led(0, 0, 1, 1, 1, 1);
+		break;
+	}
+}
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+	set_led(LED_POWER_BLINKING);
+
+	return 0;
+}
+
+#ifdef CONFIG_MISC_INIT_R
+void check_enetaddr(void)
+{
+	uchar enetaddr[6];
+
+	if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
+		/* signal unset/invalid ethaddr to user */
+		set_led(LED_INFO_BLINKING);
+	}
+}
+
+static void erase_environment(void)
+{
+	struct spi_flash *flash;
+
+	printf("Erasing environment..\n");
+	flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+	if (!flash) {
+		printf("Erasing flash failed\n");
+		return;
+	}
+
+	spi_flash_erase(flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE);
+	spi_flash_free(flash);
+	do_reset(NULL, 0, 0, NULL);
+}
+
+static void rescue_mode(void)
+{
+	uchar enetaddr[6];
+
+	printf("Entering rescue mode..\n");
+	if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
+		eth_random_enetaddr(enetaddr);
+		if (eth_setenv_enetaddr_by_index("eth", 0, enetaddr)) {
+			printf("Failed to set ethernet address\n");
+				set_led(LED_ALARM_BLINKING);
+			return;
+		}
+	}
+	setenv("bootsource", "rescue");
+}
+
+static void check_push_button(void)
+{
+	int i = 0;
+
+	while (!kw_gpio_get_value(GPIO_FUNC_BUTTON)) {
+		udelay(100000);
+		i++;
+
+		if (i == 10)
+			set_led(LED_INFO_ON);
+
+		if (i >= 100) {
+			set_led(LED_INFO_BLINKING);
+			break;
+		}
+	}
+
+	if (i >= 100)
+		erase_environment();
+	else if (i >= 10)
+		rescue_mode();
+}
+
+int misc_init_r(void)
+{
+	check_enetaddr();
+	check_push_button();
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+void show_boot_progress(int progress)
+{
+	if (progress > 0)
+		return;
+
+	/* this is not an error, eg. bootp with autoload=no will trigger this */
+	if (progress == -BOOTSTAGE_ID_NET_LOADED)
+		return;
+
+	set_led(LED_ALARM_BLINKING);
+}
+#endif
+
+#ifdef CONFIG_RESET_PHY_R
+/* Configure and enable MV88E1118 PHY */
+void reset_phy(void)
+{
+	u16 devadr;
+	char *name = "egiga1";
+
+	if (miiphy_set_current_dev(name))
+		return;
+
+	/* command to read PHY dev address */
+	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+		printf("Err..%s could not read PHY dev address\n", __func__);
+		return;
+	}
+
+	/* reset the phy */
+	miiphy_reset(name, devadr);
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/buffalo/lsxl/lsxl.h b/board/buffalo/lsxl/lsxl.h
new file mode 100644
index 0000000..2a2642e
--- /dev/null
+++ b/board/buffalo/lsxl/lsxl.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __LSXL_H
+#define __LSXL_H
+
+#define GPIO_HDD_POWER		10
+#define GPIO_USB_VBUS		11
+#define GPIO_FAN_HIGH		18
+#define GPIO_FAN_LOW		19
+#define GPIO_FUNC_LED		36
+#define GPIO_ALARM_LED		37
+#define GPIO_INFO_LED		38
+#define GPIO_POWER_LED		39
+#define GPIO_FAN_LOCK		40
+#define GPIO_FUNC_BUTTON	41
+#define GPIO_POWER_SWITCH	42
+#define GPIO_POWER_AUTO_SWITCH	43
+#define GPIO_FUNC_RED_LED	48
+
+#define _BIT(x) (1<<(x))
+
+#define LSXL_OE_LOW (~(_BIT(GPIO_HDD_POWER)		    \
+			| _BIT(GPIO_USB_VBUS)		    \
+			| _BIT(GPIO_FAN_HIGH)		    \
+			| _BIT(GPIO_FAN_LOW)))
+
+#define LSXL_OE_HIGH (~(_BIT(GPIO_FUNC_LED - 32)	    \
+			| _BIT(GPIO_ALARM_LED - 32)	    \
+			| _BIT(GPIO_INFO_LED - 32)	    \
+			| _BIT(GPIO_POWER_LED - 32)	    \
+			| _BIT(GPIO_FUNC_RED_LED - 32)))
+
+#define LSXL_OE_VAL_LOW (_BIT(GPIO_HDD_POWER)		    \
+			| _BIT(GPIO_USB_VBUS))
+
+#define LSXL_OE_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32)	    \
+			| _BIT(GPIO_ALARM_LED - 32)	    \
+			| _BIT(GPIO_INFO_LED - 32)	    \
+			| _BIT(GPIO_POWER_LED - 32)	    \
+			| _BIT(GPIO_FUNC_RED_LED - 32))
+
+#define LSXL_POL_VAL_LOW (_BIT(GPIO_FAN_HIGH)		    \
+			| _BIT(GPIO_FAN_LOW))
+
+#define LSXL_POL_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32)	    \
+			| _BIT(GPIO_ALARM_LED - 32)	    \
+			| _BIT(GPIO_INFO_LED - 32)	    \
+			| _BIT(GPIO_POWER_LED - 32)	    \
+			| _BIT(GPIO_FUNC_BUTTON - 32)	    \
+			| _BIT(GPIO_POWER_SWITCH - 32)	    \
+			| _BIT(GPIO_POWER_AUTO_SWITCH - 32) \
+			| _BIT(GPIO_FUNC_RED_LED - 32))
+
+#endif /* __LSXL_H */
diff --git a/boards.cfg b/boards.cfg
index 5f328b5..cd4e982 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -137,6 +137,8 @@ hawkboard_uart               arm         arm926ejs   da8xxevm            davinci
 enbw_cmc                     arm         arm926ejs   enbw_cmc            enbw           davinci
 calimain                     arm         arm926ejs   calimain            omicron        davinci
 dns325                       arm         arm926ejs   -                   d-link         kirkwood
+lschlv2                      arm         arm926ejs   lsxl                buffalo        kirkwood    lsxl:LSCHLV2
+lsxhl                        arm         arm926ejs   lsxl                buffalo        kirkwood    lsxl:LSXHL
 km_kirkwood                  arm         arm926ejs   km_arm              keymile        kirkwood	km_kirkwood:KM_DISABLE_PCI
 km_kirkwood_pci              arm         arm926ejs   km_arm              keymile        kirkwood	km_kirkwood:KM_RECONFIG_XLX
 mgcoge3un                    arm         arm926ejs   km_arm              keymile        kirkwood
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
new file mode 100644
index 0000000..b45c72b
--- /dev/null
+++ b/include/configs/lsxl.h
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_LSXL_H
+#define _CONFIG_LSXL_H
+
+/*
+ * Version number information
+ */
+#if defined(CONFIG_LSCHLV2)
+#define CONFIG_IDENT_STRING " LS-CHLv2"
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
+#define CONFIG_MACH_TYPE 3006
+#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
+#elif defined(CONFIG_LSXHL)
+#define CONFIG_IDENT_STRING " LS-XHL"
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
+#define CONFIG_MACH_TYPE 2663
+/* CONFIG_SYS_TCLK is 200000000 by default */
+#else
+#error "unknown board"
+#endif
+
+/*
+ * General configuration options
+ */
+#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
+#define CONFIG_KIRKWOOD			/* SOC Family Name */
+#define CONFIG_KW88F6281		/* SOC Name */
+
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_RANDOM_MACADDR
+#define CONFIG_SETENV_ENETADDR_BY_INDEX
+#define CONFIG_KIRKWOOD_GPIO
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+/*
+ * Enable u-boot API for standalone programs.
+ */
+#define CONFIG_API
+
+/*
+ * Commands configuration
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_USB
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/* ST M25P40 */
+#undef CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_SPI_FLASH_STMICRO
+#undef CONFIG_ENV_SPI_MAX_HZ
+#define CONFIG_ENV_SPI_MAX_HZ		25000000
+#undef CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_SF_DEFAULT_SPEED		25000000
+
+
+#undef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT		"=> "
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+/*
+ *  Environment variables configurations
+ */
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	8
+#define CONFIG_ENV_IS_IN_SPI_FLASH	1
+#define CONFIG_ENV_SECT_SIZE		0x10000 /* 64K */
+#else
+#define CONFIG_ENV_IS_NOWHERE
+#endif
+
+#define CONFIG_ENV_SIZE			0x10000 /* 64k */
+#define CONFIG_ENV_OFFSET		0x70000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_LOADADDR		0x00800000
+#define CONFIG_BOOTCOMMAND	"run bootcmd_${bootsource}"
+#define CONFIG_BOOTARGS		"console=ttyS0,115200 root=/dev/sda2"
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"bootsource=hdd\0"						\
+	"hdpart=0:1\0"							\
+	"bootcmd_net=bootp 0x00100000 uImage "				\
+		"&& tftpboot 0x00800000 uInitrd "			\
+		"&& bootm 0x00100000 0x00800000\0"			\
+	"bootcmd_hdd=ide reset "					\
+		"&& ext2load ide ${hdpart} 0x00100000 /uImage "		\
+		"&& ext2load ide ${hdpart} 0x00800000 /uInitrd "	\
+		"&& bootm 0x00100000 0x00800000\0"			\
+	"bootcmd_usb=usb start "					\
+		"&& fatload usb 0:1 0x00100000 /uImage "		\
+		"&& fatload usb 0:1 0x00800000 /uInitrd "		\
+		"&& bootm 0x00100000 0x00800000\0"			\
+	"bootcmd_rescue=run config_nc_dhcp; run nc\0"			\
+	"eraseenv=sf probe 0 "						\
+		"&& sf erase " MK_STR(CONFIG_ENV_OFFSET)		\
+			" +" MK_STR(CONFIG_ENV_SIZE) "\0"		\
+	"config_nc_dhcp=setenv autoload_old ${autoload}; "		\
+		"setenv autoload no "					\
+		"&& bootp "						\
+		"&& setenv ncip ${serverip} "				\
+		"&& setenv autoload ${autoload_old}; "			\
+		"setenv autoload_old\0"					\
+	"standard_env=setenv ipaddr; setenv netmask; setenv serverip; "	\
+		"setenv ncip; setenv gatewayip; setenv ethact; "	\
+		"setenv bootfile; setenv dnsip; "			\
+		"setenv bootsource hdd; run ser\0"			\
+	"restore_env=run standard_env; saveenv; reset\0"		\
+	"ser=setenv stdin serial; setenv stdout serial; "		\
+		"setenv stderr serial\0"				\
+	"nc=setenv stdin nc; setenv stdout nc; setenv stderr nc\0"	\
+	"stdin=serial\0"						\
+	"stdout=serial\0"						\
+	"stderr=serial\0"
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_MVGBE_PORTS		{0, 1} /* enable port 1 only */
+#define CONFIG_PHY_BASE_ADR		7
+#endif /* CONFIG_CMD_NET */
+
+#ifdef CONFIG_CMD_IDE
+#undef CONFIG_IDE_LED
+#undef CONFIG_SYS_IDE_MAXBUS
+#define CONFIG_SYS_IDE_MAXBUS		1
+#undef CONFIG_SYS_IDE_MAXDEVICE
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+#define CONFIG_SYS_ATA_IDE0_OFFSET	MV_SATA_PORT0_OFFSET
+#endif
+
+#endif /* _CONFIG_LSXL_H */
-- 
1.7.2.5

[U-Boot] [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support

[Michael Walle]

[sorry my first mail didn't have 'Kirkwood' in the subject]

> This patch adds support for both the Linkstation Live (LS-CHLv2) and
> Linkstation Pro (LS-XHL) by Buffalo.

Am Freitag 11 Mai 2012, 18:51:09 schrieb Prafulla Wadaskar:
> I will check on this patch in this week end since I am travelling.

Hi Prafulla,

did you find the time to review the arm/board specific patches in this series 
(http://patchwork.ozlabs.org/patch/158627/)?

-- 
Michael

[U-Boot] [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support

[Prafulla Wadaskar]

> -----Original Message-----
> From: Michael Walle [mailto:michael at walle.cc]
> Sent: 23 May 2012 02:28
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar
> Subject: Re: [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board
> support
> 
> 
> [sorry my first mail didn't have 'Kirkwood' in the subject]
> 
> > This patch adds support for both the Linkstation Live (LS-CHLv2) and
> > Linkstation Pro (LS-XHL) by Buffalo.
> 
> Am Freitag 11 Mai 2012, 18:51:09 schrieb Prafulla Wadaskar:
> > I will check on this patch in this week end since I am travelling.
> 
> Hi Prafulla,
> 
> did you find the time to review the arm/board specific patches in this
> series
> (http://patchwork.ozlabs.org/patch/158627/)?

I will do it on this weekend

Regards..
Prafulla . . .

[U-Boot] [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support

[Prafulla Wadaskar]

> -----Original Message-----
> From: Michael Walle [mailto:michael at walle.cc]
> Sent: 12 May 2012 04:21
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar; Wolfgang Denk; Mike Frysinger; Joe Hershberger;
> Michael Walle
> Subject: [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support
>
> This patch adds support for both the Linkstation Live (LS-CHLv2) and
> Linkstation Pro (LS-XHL) by Buffalo.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> Cc: Prafulla Wadaskar <prafulla@marvell.com>
> ---
>  MAINTAINERS                           |    5 +
>  board/buffalo/lsxl/Makefile           |   50 ++++++
>  board/buffalo/lsxl/kwbimage-lschl.cfg |  229
> +++++++++++++++++++++++++
>  board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229
> +++++++++++++++++++++++++

BTW: These two file looks similar, what is the difference?

>  board/buffalo/lsxl/lsxl.c             |  302
> +++++++++++++++++++++++++++++++++
>  board/buffalo/lsxl/lsxl.h             |   75 ++++++++
>  boards.cfg                            |    2 +
>  include/configs/lsxl.h                |  182 ++++++++++++++++++++
>  8 files changed, 1074 insertions(+), 0 deletions(-)
>  create mode 100644 board/buffalo/lsxl/Makefile
>  create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg
>  create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg
>  create mode 100644 board/buffalo/lsxl/lsxl.c
>  create mode 100644 board/buffalo/lsxl/lsxl.h
>  create mode 100644 include/configs/lsxl.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e2441d8..929ba6f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -894,6 +894,11 @@ Prafulla Wadaskar <prafulla@marvell.com>
>       rd6281a         ARM926EJS (Kirkwood SoC)
>       sheevaplug      ARM926EJS (Kirkwood SoC)
>
> +Michael Walle <michael@walle.cc>
> +
> +     lschlv2         ARM926EJS (Kirkwood SoC)
> +     lsxhl           ARM926EJS (Kirkwood SoC)
> +
>  Tom Warren <twarren@nvidia.com>
>
>       harmony         Tegra2 (ARM7 & A9 Dual Core)
> diff --git a/board/buffalo/lsxl/Makefile b/board/buffalo/lsxl/Makefile
> new file mode 100644
> index 0000000..d06c882
> --- /dev/null
> +++ b/board/buffalo/lsxl/Makefile
> @@ -0,0 +1,50 @@
> +#
> +# Copyright (c) 2012 Michael Walle
> +# Michael Walle <michael@walle.cc>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.        See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> +# MA 02110-1301 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB  = $(obj)lib$(BOARD).o
> +
> +COBJS        := lsxl.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS        := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):      $(obj).depend $(OBJS) $(SOBJS)
> +     $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +clean:
> +     rm -f $(SOBJS) $(OBJS)
> +
> +distclean:   clean
> +     rm -f $(LIB) core *.bak .depend
> +
> +#####################################################################
> ####
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#####################################################################
> ####
> diff --git a/board/buffalo/lsxl/kwbimage-lschl.cfg
> b/board/buffalo/lsxl/kwbimage-lschl.cfg
> new file mode 100644
> index 0000000..2b9b3cd
> --- /dev/null
> +++ b/board/buffalo/lsxl/kwbimage-lschl.cfg
> @@ -0,0 +1,229 @@
> +#
> +# Copyright (c) 2012 Michael Walle
> +# Michael Walle <michael@walle.cc>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> +# MA 02110-1301 USA
> +#
> +# Refer docs/README.kwimage for more details about how-to configure
> +# and create kirkwood boot image
> +#
> +
> +# Boot Media configurations
> +BOOT_FROM spi
> +
> +# SOC registers configuration using bootrom header extension
> +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
> +
> +# Configure RGMII-0/1 interface pad voltage to 1.8V
> +DATA 0xFFD100E0 0x1B1B1B9B
> +
> +# L2 RAM Timing 0
> +DATA 0xFFD20134 0xBBBBBBBB
> +# not further specified in HW manual, timing taken from original
> vendor port
> +
> +# L2 RAM Timing 1
> +DATA 0xFFD20138 0x00BBBBBB
> +# not further specified in HW manual, timing taken from original
> vendor port
> +
> +# DDR Configuration register
> +DATA 0xFFD01400 0x43000618
> +# bit13-0:  0x618, 1560 DDR2 clks refresh rate
> +# bit23-14: 0 required
> +# bit24:    1, enable exit self refresh mode on DDR access
> +# bit25:    1 required
> +# bit29-26: 0 required
> +# bit31-30: 0b01 required
> +
> +# DDR Controller Control Low
> +DATA 0xFFD01404 0x39543000
> +# bit3-0:   0 required
> +# bit4:     0, addr/cmd in same cycle
> +# bit5:     0, clk is driven during self refresh, we don't care for
> APX
> +# bit6:     0, use recommended falling edge of clk for addr/cmd
> +# bit11-7:  0 required
> +# bit12:    1 required
> +# bit13:    1 required
> +# bit14:    0, input buffer always powered up
> +# bit17-15: 0 required
> +# bit18:    1, cpu lock transaction enabled
> +# bit19:    0 required
> +# bit23-20: 5, recommended value for CL=5 and STARTBURST_DEL disabled
> bit31=0
> +# bit27-24: 9, CL+4, STARTBURST sample stages, for freqs 400MHz,
> unbuffered DIMM
> +# bit30-28: 3 required
> +# bit31:    0, no additional STARTBURST delay
> +
> +# DDR Timing (Low)
> +DATA 0xFFD01408 0x3302444F
> +# bit3-0:   0xf, 16 cycle tRAS (tRAS[3-0])
> +# bit7-4:   4, 5 cycle tRCD
> +# bit11-8:  4, 5 cyle tRP
> +# bit15-12: 4, 5 cyle tWR
> +# bit19-16: 2, 3 cyle tWTR
> +# bit20:    0, 16 cycle tRAS (tRAS[4])
> +# bit23-21: 0 required
> +# bit27-24: 3, 4 cycle tRRD
> +# bit31-28: 3, 4 cyle tRTP
> +
> +# DDR Timing (High)
> +DATA 0xFFD0140C 0x00000823
> +# bit6-0:   0x23, 35 cycle tRFC
> +# bit8-7:   0, 1 cycle tR2R
> +# bit10-9:  0, 1 cyle tR2W
> +# bit12-11: 1, 2 cylce tW2W
> +# bit31-13: 0 required
> +
> +# DDR Address Control
> +DATA 0xFFD01410 0x00000009
> +# bit1-0:   1, Cs0width=x16
> +# bit3-2:   2, Cs0size=512Mbit
> +# bit5-4:   0, Cs1width=nonexistent
> +# bit7-6:   0, Cs1size=nonexistent
> +# bit9-8:   0, Cs2width=nonexistent
> +# bit11-10: 0, Cs2size=nonexistent
> +# bit13-12: 0, Cs3width=nonexistent
> +# bit15-14: 0, Cs3size=nonexistent
> +# bit16:    0, Cs0AddrSel
> +# bit17:    0, Cs1AddrSel
> +# bit18:    0, Cs2AddrSel
> +# bit19:    0, Cs3AddrSel
> +# bit31-20: 0 required
> +
> +# DDR Open Pages Control
> +DATA 0xFFD01414 0x00000000
> +# bit0:    0, OPEn=OpenPage enabled
> +# bit31-1: 0 required
> +
> +# DDR Operation
> +DATA 0xFFD01418 0x00000000
> +# bit3-0:   0, Cmd=Normal SDRAM Mode
> +# bit31-4:  0 required
> +
> +# DDR Mode
> +DATA 0xFFD0141C 0x00000652
> +# bit2-0:   2, Burst Length (2 required)
> +# bit3:     0, Burst Type (0 required)
> +# bit6-4:   5, CAS Latency (CL) 5
> +# bit7:     0, (Test Mode) Normal operation
> +# bit8:     0, (Reset DLL) Normal operation
> +# bit11-9:  3, Write recovery for auto-precharge (3 required)
> +# bit12:    0, Fast Active power down exit time (0 required)
> +# bit31-13: 0 required
> +
> +# DDR Extended Mode
> +DATA 0xFFD01420 0x00000042
> +# bit0:     0, DRAM DLL enabled
> +# bit1:     1, DRAM drive strength reduced
> +# bit2:     0, ODT control Rtt[0] (Rtt=2, 150 ohm termination)
> +# bit5-3:   0 required
> +# bit6:     1, ODT control Rtt[1] (Rtt=2, 150 ohm termination)
> +# bit9-7:   0 required
> +# bit10:    0, differential DQS enabled
> +# bit11:    0 required
> +# bit12:    0, DRAM output buffer enabled
> +# bit31-13: 0 required
> +
> +# DDR Controller Control High
> +DATA 0xFFD01424 0x0000F17F
> +# bit2-0:   0x7 required
> +# bit3:     1, MBUS Burst Chop disabled
> +# bit6-4:   0x7 required
> +# bit7:     0 required (???)
> +# bit8:     1, add writepath sample stage, must be 1 for DDR freq >=
> 300MHz
> +# bit9:     0, no half clock cycle addition to dataout
> +# bit10:    0, 1/4 clock cycle skew enabled for addr/ctl signals
> +# bit11:    0, 1/4 clock cycle skew disabled for write mesh
> +# bit15-12: 0xf required
> +# bit31-16: 0 required
> +
> +# DDR2 ODT Read Timing (default values)
> +DATA 0xFFD01428 0x00085520
> +# bit3-0:   0 required
> +# bit7-4:   2, 2 cycles from read command to assertion of M_ODT
> signal
> +# bit11-8:  5, 5 cycles from read command to de-assertion of M_ODT
> signal
> +# bit15-12: 5, 5 cycles from read command to assertion of internal
> ODT signal
> +# bit19-16: 8, 8 cycles from read command to de-assertion of internal
> ODT signal
> +# bit31-20: 0 required
> +
> +# DDR2 ODT Write Timing (default values)
> +DATA 0xFFD0147C 0x00008552
> +# bit3-0:   2, 2 cycles from write comand to assertion of M_ODT
> signal
> +# bit7-4:   5, 5 cycles from write command to de-assertion of M_ODT
> signal
> +# bit15-12: 5, 5 cycles from write command to assertion of internal
> ODT signal
> +# bit19-16: 8, 8 cycles from write command to de-assertion of
> internal ODT signal
> +# bit31-16: 0 required
> +
> +# CS[0]n Base address
> +DATA 0xFFD01500 0x00000000
> +# at 0x0
> +
> +# CS[0]n Size
> +DATA 0xFFD01504 0x03FFFFF1
> +# bit0:     1, Window enabled
> +# bit1:     0, Write Protect disabled
> +# bit3-2:   0x0, CS0 hit selected
> +# bit23-4:  0xfffff required
> +# bit31-24: 0x03, Size (i.e. 64MB)
> +
> +# CS[1]n Size
> +DATA 0xFFD0150C 0x00000000
> +# window disabled
> +
> +# CS[2]n Size
> +DATA 0xFFD01514 0x00000000
> +# window disabled
> +
> +# CS[3]n Size
> +DATA 0xFFD0151C 0x00000000
> +# window disabled
> +
> +# DDR ODT Control (Low)
> +DATA 0xFFD01494 0x003C0000
> +# bit3-0:   0b0000, (read) M_ODT[0] is not asserted during read from
> DRAM
> +# bit7-4:   0b0000, (read) M_ODT[1] is not asserted during read from
> DRAM
> +# bit15-8:  0 required
> +# bit19-16: 0b1100, (write) M_ODT[0] is asserted during write to DRAM
> CS2, CS3
> +# bit23-20: 0b0011, (write) M_ODT[1] is asserted during write to DRAM
> CS0, CS1
> +# bit31-24: 0 required
> +
> +# DDR ODT Control (High)
> +DATA 0xFFD01498 0x00000000
> +# bit1-0:   0, M_ODT[0] assertion is controlled by ODT Control Low
> register
> +# bit3-2:   0, M_ODT[1] assertion is controlled by ODT Control Low
> register
> +# bit31-4   0 required
> +
> +# CPU ODT Control
> +DATA 0xFFD0149C 0x0000E80F
> +# bit3-0:   0b1111, internal ODT is asserted during read from DRAM
> bank 0-3
> +# bit7-4:   0b0000, internal ODT is not asserted during write to DRAM
> bank 0-3
> +# bit9-8:   0, Internal ODT assertion is controlled by fiels
> +# bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
> +# bit13-12: 2, M_STARTBURST_IN I/O buffer ODT 75 ohm
> +# bit14:    1, M_STARTBURST_IN ODT enabled
> +# bit15:    1, DDR IO ODT Unit: Drive ODT calibration values
> +# bit20-16: 0, Pad N channel driving strength for ODT
> +# bit25-21: 0, Pad P channel driving strength for ODT
> +# bit31-26: 0 required
> +
> +# DDR Initialization Control
> +DATA 0xFFD01480 0x00000001
> +# bit0:     1, enable DDR init upon this register write
> +# bit31-1:  0, required
> +
> +# End of Header extension
> +DATA 0x0 0x0
> diff --git a/board/buffalo/lsxl/kwbimage-lsxhl.cfg
> b/board/buffalo/lsxl/kwbimage-lsxhl.cfg
> new file mode 100644
> index 0000000..8a94b6c
> --- /dev/null
> +++ b/board/buffalo/lsxl/kwbimage-lsxhl.cfg
> @@ -0,0 +1,229 @@
> +#
> +# Copyright (c) 2012 Michael Walle
> +# Michael Walle <michael@walle.cc>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> +# MA 02110-1301 USA
> +#
> +# Refer docs/README.kwimage for more details about how-to configure
> +# and create kirkwood boot image
> +#
> +
> +# Boot Media configurations
> +BOOT_FROM spi
> +
> +# SOC registers configuration using bootrom header extension
> +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
> +
> +# Configure RGMII-0/1 interface pad voltage to 1.8V
> +DATA 0xFFD100E0 0x1B1B9B9B
> +
> +# L2 RAM Timing 0
> +DATA 0xFFD20134 0xBBBBBBBB
> +# not further specified in HW manual, timing taken from original
> vendor port
> +
> +# L2 RAM Timing 1
> +DATA 0xFFD20138 0x00BBBBBB
> +# not further specified in HW manual, timing taken from original
> vendor port
> +
> +# DDR Configuration register
> +DATA 0xFFD01400 0x43000618
> +# bit13-0:  0x618, 1560 DDR2 clks refresh rate
> +# bit23-14: 0 required
> +# bit24:    1, enable exit self refresh mode on DDR access
> +# bit25:    1 required
> +# bit29-26: 0 required
> +# bit31-30: 0b01 required
> +
> +# DDR Controller Control Low
> +DATA 0xFFD01404 0x39543010
> +# bit3-0:   0 required
> +# bit4:     1, T2 mode, addr/cmd are driven for two cycles
> +# bit5:     0, clk is driven during self refresh, we don't care for
> APX
> +# bit6:     0, use recommended falling edge of clk for addr/cmd
> +# bit11-7:  0 required
> +# bit12:    1 required
> +# bit13:    1 required
> +# bit14:    0, input buffer always powered up
> +# bit17-15: 0 required
> +# bit18:    1, cpu lock transaction enabled
> +# bit19:    0 required
> +# bit23-20: 5, recommended value for CL=5 and STARTBURST_DEL disabled
> bit31=0
> +# bit27-24: 9, CL+4, STARTBURST sample stages, for freqs 400MHz,
> unbuffered DIMM
> +# bit30-28: 3 required
> +# bit31:    0, no additional STARTBURST delay
> +
> +# DDR Timing (Low)
> +DATA 0xFFD01408 0x22125441
> +# bit3-0:   0x1, 18 cycle tRAS (tRAS[3-0])
> +# bit7-4:   4, 5 cycle tRCD
> +# bit11-8:  4, 5 cyle tRP
> +# bit15-12: 5, 6 cyle tWR
> +# bit19-16: 2, 3 cyle tWTR
> +# bit20:    1, 18 cycle tRAS (tRAS[4])
> +# bit23-21: 0 required
> +# bit27-24: 2, 3 cycle tRRD
> +# bit31-28: 2, 3 cyle tRTP
> +
> +# DDR Timing (High)
> +DATA 0xFFD0140C 0x00000832
> +# bit6-0:   0x32, 50 cycle tRFC
> +# bit8-7:   0, 1 cycle tR2R
> +# bit10-9:  0, 1 cyle tR2W
> +# bit12-11: 1, 2 cylce tW2W
> +# bit31-13: 0 required
> +
> +# DDR Address Control
> +DATA 0xFFD01410 0x0000000C
> +# bit1-0:   0, Cs0width=x8
> +# bit3-2:   3, Cs0size=1Gbit
> +# bit5-4:   0, Cs1width=nonexistent
> +# bit7-6:   0, Cs1size=nonexistent
> +# bit9-8:   0, Cs2width=nonexistent
> +# bit11-10: 0, Cs2size=nonexistent
> +# bit13-12: 0, Cs3width=nonexistent
> +# bit15-14: 0, Cs3size=nonexistent
> +# bit16:    0, Cs0AddrSel
> +# bit17:    0, Cs1AddrSel
> +# bit18:    0, Cs2AddrSel
> +# bit19:    0, Cs3AddrSel
> +# bit31-20: 0 required
> +
> +# DDR Open Pages Control
> +DATA 0xFFD01414 0x00000000
> +# bit0:    0, OPEn=OpenPage enabled
> +# bit31-1: 0 required
> +
> +# DDR Operation
> +DATA 0xFFD01418 0x00000000
> +# bit3-0:   0, Cmd=Normal SDRAM Mode
> +# bit31-4:  0 required
> +
> +# DDR Mode
> +DATA 0xFFD0141C 0x00000652
> +# bit2-0:   2, Burst Length (2 required)
> +# bit3:     0, Burst Type (0 required)
> +# bit6-4:   5, CAS Latency (CL) 5
> +# bit7:     0, (Test Mode) Normal operation
> +# bit8:     0, (Reset DLL) Normal operation
> +# bit11-9:  3, Write recovery for auto-precharge (3 required)
> +# bit12:    0, Fast Active power down exit time (0 required)
> +# bit31-13: 0 required
> +
> +# DDR Extended Mode
> +DATA 0xFFD01420 0x00000006
> +# bit0:     0, DRAM DLL enabled
> +# bit1:     1, DRAM drive strength reduced
> +# bit2:     1, ODT control Rtt[0] (Rtt=1, 75 ohm termination)
> +# bit5-3:   0 required
> +# bit6:     0, ODT control Rtt[1] (Rtt=1, 75 ohm termination)
> +# bit9-7:   0 required
> +# bit10:    0, differential DQS enabled
> +# bit11:    0 required
> +# bit12:    0, DRAM output buffer enabled
> +# bit31-13: 0 required
> +
> +# DDR Controller Control High
> +DATA 0xFFD01424 0x0000F17F
> +# bit2-0:   0x7 required
> +# bit3:     1, MBUS Burst Chop disabled
> +# bit6-4:   0x7 required
> +# bit7:     0 required (???)
> +# bit8:     1, add writepath sample stage, must be 1 for DDR freq >=
> 300MHz
> +# bit9:     0, no half clock cycle addition to dataout
> +# bit10:    0, 1/4 clock cycle skew enabled for addr/ctl signals
> +# bit11:    0, 1/4 clock cycle skew disabled for write mesh
> +# bit15-12: 0xf required
> +# bit31-16: 0 required
> +
> +# DDR2 ODT Read Timing (default values)
> +DATA 0xFFD01428 0x00085520
> +# bit3-0:   0 required
> +# bit7-4:   2, 2 cycles from read command to assertion of M_ODT
> signal
> +# bit11-8:  5, 5 cycles from read command to de-assertion of M_ODT
> signal
> +# bit15-12: 5, 5 cycles from read command to assertion of internal
> ODT signal
> +# bit19-16: 8, 8 cycles from read command to de-assertion of internal
> ODT signal
> +# bit31-20: 0 required
> +
> +# DDR2 ODT Write Timing (default values)
> +DATA 0xFFD0147C 0x00008552
> +# bit3-0:   2, 2 cycles from write comand to assertion of M_ODT
> signal
> +# bit7-4:   5, 5 cycles from write command to de-assertion of M_ODT
> signal
> +# bit15-12: 5, 5 cycles from write command to assertion of internal
> ODT signal
> +# bit19-16: 8, 8 cycles from write command to de-assertion of
> internal ODT signal
> +# bit31-16: 0 required
> +
> +# CS[0]n Base address
> +DATA 0xFFD01500 0x00000000
> +# at 0x0
> +
> +# CS[0]n Size
> +DATA 0xFFD01504 0x0FFFFFF1
> +# bit0:     1, Window enabled
> +# bit1:     0, Write Protect disabled
> +# bit3-2:   0x0, CS0 hit selected
> +# bit23-4:  0xfffff required
> +# bit31-24: 0x0f, Size (i.e. 256MB)
> +
> +# CS[1]n Size
> +DATA 0xFFD0150C 0x00000000
> +# window disabled
> +
> +# CS[2]n Size
> +DATA 0xFFD01514 0x00000000
> +# window disabled
> +
> +# CS[3]n Size
> +DATA 0xFFD0151C 0x00000000
> +# window disabled
> +
> +# DDR ODT Control (Low)
> +DATA 0xFFD01494 0x00010000
> +# bit3-0:   0b0000, (read) M_ODT[0] is not asserted during read from
> DRAM
> +# bit7-4:   0b0000, (read) M_ODT[1] is not asserted during read from
> DRAM
> +# bit15-8:  0 required
> +# bit19-16: 0b0001, (write) M_ODT[0] is asserted during write to DRAM
> CS0
> +# bit23-20: 0b0000, (write) M_ODT[1] is not asserted during write to
> DRAM
> +# bit31-24: 0 required
> +
> +# DDR ODT Control (High)
> +DATA 0xFFD01498 0x00000000
> +# bit1-0:   0, M_ODT[0] assertion is controlled by ODT Control Low
> register
> +# bit3-2:   0, M_ODT[1] assertion is controlled by ODT Control Low
> register
> +# bit31-4   0 required
> +
> +# CPU ODT Control
> +DATA 0xFFD0149C 0x0000E80F
> +# bit3-0:   0b1111, internal ODT is asserted during read from DRAM
> bank 0-3
> +# bit7-4:   0b0000, internal ODT is not asserted during write to DRAM
> bank 0-3
> +# bit9-8:   0, Internal ODT assertion is controlled by fiels
> +# bit11-10: 2, M_DQ, M_DM, and M_DQS I/O buffer ODT 75 ohm
> +# bit13-12: 2, M_STARTBURST_IN I/O buffer ODT 75 ohm
> +# bit14:    1, M_STARTBURST_IN ODT enabled
> +# bit15:    1, DDR IO ODT Unit: Drive ODT calibration values
> +# bit20-16: 0, Pad N channel driving strength for ODT
> +# bit25-21: 0, Pad P channel driving strength for ODT
> +# bit31-26: 0 required
> +
> +# DDR Initialization Control
> +DATA 0xFFD01480 0x00000001
> +# bit0:     1, enable DDR init upon this register write
> +# bit31-1:  0, required
> +
> +# End of Header extension
> +DATA 0x0 0x0
> diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
> new file mode 100644
> index 0000000..603d11a
> --- /dev/null
> +++ b/board/buffalo/lsxl/lsxl.c
> @@ -0,0 +1,302 @@
> +/*
> + * Copyright (c) 2012 Michael Walle
> + * Michael Walle <michael@walle.cc>
> + *
> + * Based on sheevaplug/sheevaplug.c by
> + *   Marvell Semiconductor <www.marvell.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include <common.h>
> +#include <net.h>
> +#include <malloc.h>
> +#include <netdev.h>
> +#include <miiphy.h>
> +#include <asm/arch/kirkwood.h>
> +#include <asm/arch/cpu.h>
> +#include <asm/arch/mpp.h>
> +#include <asm/arch/gpio.h>
> +#include <spi_flash.h>
> +
> +#include "lsxl.h"
> +
> +/*
> + * Rescue mode
> + *
> + * Selected by holding the push button for 3 seconds, while powering
> on
> + * the device.
> + *
> + * These linkstations don't have a (populated) serial port. There is
> no
> + * way to access an (unmodified) board other than using the
> netconsole. If
> + * you want to recover from a bad environment setting or an empty
> environment,
> + * you can do this only with a working network connection. Therefore,
> a random
> + * ethernet address is generated if none is set and a DHCP request is
> sent.
> + * After a successful DHCP response is received, the network settings
> are
> + * configured and the ncip parameter is set to the serverip. Eg. for
> a working
> + * resuce mode, you should set 'next-server' to the host where the
> netconsole
> + * client is started.
> + * Additionally, the bootsource is set to 'cli'.
> + */
> +
> +#ifndef CONFIG_ENV_OVERWRITE
> +# error "You need to set CONFIG_ENV_OVERWRITE"
> +#endif
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_early_init_f(void)
> +{
> +     /*
> +      * default gpio configuration
> +      * There are maximum 64 gpios controlled through 2 sets of
> registers
> +      * the below configuration configures mainly initial LED status
> +      */
> +     kw_config_gpio(LSXL_OE_VAL_LOW,
> +                     LSXL_OE_VAL_HIGH,
> +                     LSXL_OE_LOW, LSXL_OE_HIGH);
> +
> +     /*
> +      * Multi-Purpose Pins Functionality configuration
> +      * These strappings are taken from the original vendor uboot port.
> +      */
> +     u32 kwmpp_config[] = {
> +             MPP0_SPI_SCn,
> +             MPP1_SPI_MOSI,
> +             MPP2_SPI_SCK,
> +             MPP3_SPI_MISO,
> +             MPP4_UART0_RXD,
> +             MPP5_UART0_TXD,
> +             MPP6_SYSRST_OUTn,
> +             MPP7_GPO,
> +             MPP8_GPIO,
> +             MPP9_GPIO,
> +             MPP10_GPO,              /* HDD power */
> +             MPP11_GPIO,             /* USB Vbus enable */
> +             MPP12_SD_CLK,
> +             MPP13_SD_CMD,
> +             MPP14_SD_D0,
> +             MPP15_SD_D1,
> +             MPP16_SD_D2,
> +             MPP17_SD_D3,
> +             MPP18_GPO,              /* fan speed high */
> +             MPP19_GPO,              /* fan speed low */
> +             MPP20_GE1_0,
> +             MPP21_GE1_1,
> +             MPP22_GE1_2,
> +             MPP23_GE1_3,
> +             MPP24_GE1_4,
> +             MPP25_GE1_5,
> +             MPP26_GE1_6,
> +             MPP27_GE1_7,
> +             MPP28_GPIO,
> +             MPP29_GPIO,
> +             MPP30_GE1_10,
> +             MPP31_GE1_11,
> +             MPP32_GE1_12,
> +             MPP33_GE1_13,
> +             MPP34_GPIO,
> +             MPP35_GPIO,
> +             MPP36_GPIO,             /* function LED */
> +             MPP37_GPIO,             /* alarm LED */
> +             MPP38_GPIO,             /* info LED */
> +             MPP39_GPIO,             /* power LED */
> +             MPP40_GPIO,             /* fan alarm */
> +             MPP41_GPIO,             /* funtion button */
> +             MPP42_GPIO,             /* power switch */
> +             MPP43_GPIO,             /* power auto switch */
> +             MPP44_GPIO,
> +             MPP45_GPIO,
> +             MPP46_GPIO,
> +             MPP47_GPIO,
> +             MPP48_GPIO,             /* function red LED */
> +             MPP49_GPIO,
> +             0
> +     };
> +
> +     kirkwood_mpp_conf(kwmpp_config);
> +
> +     return 0;
> +}
> +
> +#define LED_OFF             0
> +#define LED_ALARM_ON        1
> +#define LED_ALARM_BLINKING  2
> +#define LED_POWER_ON        3
> +#define LED_POWER_BLINKING  4
> +#define LED_INFO_ON         5
> +#define LED_INFO_BLINKING   6
> +
> +static void __set_led(int blink_alarm, int blink_info, int
> blink_power,
> +             int value_alarm, int value_info, int value_power)
> +{
> +     kw_gpio_set_blink(GPIO_ALARM_LED, blink_alarm);
> +     kw_gpio_set_blink(GPIO_INFO_LED, blink_info);
> +     kw_gpio_set_blink(GPIO_POWER_LED, blink_power);
> +     kw_gpio_set_value(GPIO_ALARM_LED, value_alarm);
> +     kw_gpio_set_value(GPIO_INFO_LED, value_info);
> +     kw_gpio_set_value(GPIO_POWER_LED, value_power);
> +}
> +
> +static void set_led(int state)
> +{
> +     switch (state) {
> +     case LED_OFF:
> +             __set_led(0, 0, 0, 0, 0, 0);
> +             break;
> +     case LED_ALARM_ON:
> +             __set_led(0, 0, 0, 0, 1, 1);
> +             break;
> +     case LED_ALARM_BLINKING:
> +             __set_led(1, 0, 0, 1, 1, 1);
> +             break;
> +     case LED_INFO_ON:
> +             __set_led(0, 0, 0, 1, 0, 1);
> +             break;
> +     case LED_INFO_BLINKING:
> +             __set_led(0, 1, 0, 1, 1, 1);
> +             break;
> +     case LED_POWER_ON:
> +             __set_led(0, 0, 0, 1, 1, 0);
> +             break;
> +     case LED_POWER_BLINKING:
> +             __set_led(0, 0, 1, 1, 1, 1);
> +             break;
> +     }
> +}
> +
> +int board_init(void)
> +{
> +     /* address of boot parameters */
> +     gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
> +
> +     set_led(LED_POWER_BLINKING);
> +
> +     return 0;
> +}
> +
> +#ifdef CONFIG_MISC_INIT_R
> +void check_enetaddr(void)
> +{
> +     uchar enetaddr[6];
> +
> +     if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
> +             /* signal unset/invalid ethaddr to user */
> +             set_led(LED_INFO_BLINKING);
> +     }
> +}
> +
> +static void erase_environment(void)

Why do you need this function?

> +{
> +     struct spi_flash *flash;
> +
> +     printf("Erasing environment..\n");
> +     flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
> +     if (!flash) {
> +             printf("Erasing flash failed\n");
> +             return;
> +     }
> +
> +     spi_flash_erase(flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE);
> +     spi_flash_free(flash);
> +     do_reset(NULL, 0, 0, NULL);
> +}
> +
> +static void rescue_mode(void)
> +{
> +     uchar enetaddr[6];
> +
> +     printf("Entering rescue mode..\n");
> +     if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
> +             eth_random_enetaddr(enetaddr);
> +             if (eth_setenv_enetaddr_by_index("eth", 0, enetaddr)) {
> +                     printf("Failed to set ethernet address\n");
> +                             set_led(LED_ALARM_BLINKING);
> +                     return;
> +             }
> +     }
> +     setenv("bootsource", "rescue");
> +}
> +
> +static void check_push_button(void)
> +{
> +     int i = 0;
> +
> +     while (!kw_gpio_get_value(GPIO_FUNC_BUTTON)) {
> +             udelay(100000);
> +             i++;
> +
> +             if (i == 10)
> +                     set_led(LED_INFO_ON);
> +
> +             if (i >= 100) {
> +                     set_led(LED_INFO_BLINKING);
> +                     break;
> +             }
> +     }
> +
> +     if (i >= 100)
> +             erase_environment();
> +     else if (i >= 10)
> +             rescue_mode();
> +}

You can overload this functionality to Reset key, you don't need any supporting code for the same, you can handle it through additional environment variables.
For more info check for "SYSTSTn Duration counter support" in Kirkwood/cpu.c

> +
> +int misc_init_r(void)
> +{
> +     check_enetaddr();
This need to be ifdefed with CONFIG_MISC_INIT_R

> +     check_push_button();
> +
> +     return 0;
> +}
> +#endif
> +
> +#ifdef CONFIG_SHOW_BOOT_PROGRESS
> +void show_boot_progress(int progress)
> +{
> +     if (progress > 0)
> +             return;
> +
> +     /* this is not an error, eg. bootp with autoload=no will trigger
> this */
> +     if (progress == -BOOTSTAGE_ID_NET_LOADED)
> +             return;
> +
> +     set_led(LED_ALARM_BLINKING);
> +}
> +#endif
> +
> +#ifdef CONFIG_RESET_PHY_R
> +/* Configure and enable MV88E1118 PHY */
> +void reset_phy(void)
> +{
> +     u16 devadr;
> +     char *name = "egiga1";
> +
> +     if (miiphy_set_current_dev(name))
> +             return;
> +
> +     /* command to read PHY dev address */
> +     if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> +             printf("Err..%s could not read PHY dev address\n", __func__);
> +             return;
> +     }
> +
> +     /* reset the phy */
> +     miiphy_reset(name, devadr);
> +}
> +#endif /* CONFIG_RESET_PHY_R */
> diff --git a/board/buffalo/lsxl/lsxl.h b/board/buffalo/lsxl/lsxl.h
> new file mode 100644
> index 0000000..2a2642e
> --- /dev/null
> +++ b/board/buffalo/lsxl/lsxl.h
> @@ -0,0 +1,75 @@
> +/*
> + * Copyright (c) 2012 Michael Walle
> + * Michael Walle <michael@walle.cc>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef __LSXL_H
> +#define __LSXL_H
> +
> +#define GPIO_HDD_POWER               10
> +#define GPIO_USB_VBUS                11
> +#define GPIO_FAN_HIGH                18
> +#define GPIO_FAN_LOW         19
> +#define GPIO_FUNC_LED                36
> +#define GPIO_ALARM_LED               37
> +#define GPIO_INFO_LED                38
> +#define GPIO_POWER_LED               39
> +#define GPIO_FAN_LOCK                40
> +#define GPIO_FUNC_BUTTON     41
> +#define GPIO_POWER_SWITCH    42
> +#define GPIO_POWER_AUTO_SWITCH       43
> +#define GPIO_FUNC_RED_LED    48
> +
> +#define _BIT(x) (1<<(x))
> +
> +#define LSXL_OE_LOW (~(_BIT(GPIO_HDD_POWER)              \
> +                     | _BIT(GPIO_USB_VBUS)               \
> +                     | _BIT(GPIO_FAN_HIGH)               \
> +                     | _BIT(GPIO_FAN_LOW)))
> +
> +#define LSXL_OE_HIGH (~(_BIT(GPIO_FUNC_LED - 32)         \
> +                     | _BIT(GPIO_ALARM_LED - 32)         \
> +                     | _BIT(GPIO_INFO_LED - 32)          \
> +                     | _BIT(GPIO_POWER_LED - 32)         \
> +                     | _BIT(GPIO_FUNC_RED_LED - 32)))
> +
> +#define LSXL_OE_VAL_LOW (_BIT(GPIO_HDD_POWER)                    \
> +                     | _BIT(GPIO_USB_VBUS))
> +
> +#define LSXL_OE_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32)       \
> +                     | _BIT(GPIO_ALARM_LED - 32)         \
> +                     | _BIT(GPIO_INFO_LED - 32)          \
> +                     | _BIT(GPIO_POWER_LED - 32)         \
> +                     | _BIT(GPIO_FUNC_RED_LED - 32))
> +
> +#define LSXL_POL_VAL_LOW (_BIT(GPIO_FAN_HIGH)                    \
> +                     | _BIT(GPIO_FAN_LOW))
> +
> +#define LSXL_POL_VAL_HIGH (_BIT(GPIO_FUNC_LED - 32)      \
> +                     | _BIT(GPIO_ALARM_LED - 32)         \
> +                     | _BIT(GPIO_INFO_LED - 32)          \
> +                     | _BIT(GPIO_POWER_LED - 32)         \
> +                     | _BIT(GPIO_FUNC_BUTTON - 32)       \
> +                     | _BIT(GPIO_POWER_SWITCH - 32)      \
> +                     | _BIT(GPIO_POWER_AUTO_SWITCH - 32) \
> +                     | _BIT(GPIO_FUNC_RED_LED - 32))
> +
> +#endif /* __LSXL_H */
> diff --git a/boards.cfg b/boards.cfg
> index 5f328b5..cd4e982 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -137,6 +137,8 @@ hawkboard_uart               arm         arm926ejs
> da8xxevm            davinci
>  enbw_cmc                     arm         arm926ejs   enbw_cmc
> enbw           davinci
>  calimain                     arm         arm926ejs   calimain
> omicron        davinci
>  dns325                       arm         arm926ejs   -
> d-link         kirkwood
> +lschlv2                      arm         arm926ejs   lsxl
> buffalo        kirkwood    lsxl:LSCHLV2
> +lsxhl                        arm         arm926ejs   lsxl
> buffalo        kirkwood    lsxl:LSXHL
>  km_kirkwood                  arm         arm926ejs   km_arm
> keymile        kirkwood       km_kirkwood:KM_DISABLE_PCI
>  km_kirkwood_pci              arm         arm926ejs   km_arm
> keymile        kirkwood       km_kirkwood:KM_RECONFIG_XLX
>  mgcoge3un                    arm         arm926ejs   km_arm
> keymile        kirkwood
> diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> new file mode 100644
> index 0000000..b45c72b
> --- /dev/null
> +++ b/include/configs/lsxl.h
> @@ -0,0 +1,182 @@
> +/*
> + * Copyright (c) 2012 Michael Walle
> + * Michael Walle <michael@walle.cc>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef _CONFIG_LSXL_H
> +#define _CONFIG_LSXL_H
> +
> +/*
> + * Version number information
> + */
> +#if defined(CONFIG_LSCHLV2)
> +#define CONFIG_IDENT_STRING " LS-CHLv2"
> +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-
> lschl.cfg
> +#define CONFIG_MACH_TYPE 3006
> +#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> +#elif defined(CONFIG_LSXHL)
> +#define CONFIG_IDENT_STRING " LS-XHL"
> +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-
> lsxhl.cfg
> +#define CONFIG_MACH_TYPE 2663

[U-Boot] [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support

[Michael Walle]

Hi Prafulla,

thanks for the review.

On Thu, May 24, 2012 09:24, Prafulla Wadaskar wrote:
>> -----Original Message-----
>> From: Michael Walle [mailto:michael at walle.cc]
>> Sent: 12 May 2012 04:21
>> To: u-boot at lists.denx.de
>> Cc: Prafulla Wadaskar; Wolfgang Denk; Mike Frysinger; Joe Hershberger;
>> Michael Walle
>> Subject: [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support
>>
>> This patch adds support for both the Linkstation Live (LS-CHLv2) and
>> Linkstation Pro (LS-XHL) by Buffalo.
>>
>> Signed-off-by: Michael Walle <michael@walle.cc>
>> Cc: Prafulla Wadaskar <prafulla@marvell.com>
>> ---
>>  MAINTAINERS                           |    5 +
>>  board/buffalo/lsxl/Makefile           |   50 ++++++
>>  board/buffalo/lsxl/kwbimage-lschl.cfg |  229
>> +++++++++++++++++++++++++
>>  board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229
>> +++++++++++++++++++++++++
>
> BTW: These two file looks similar, what is the difference?

Mainly the memory configuration, eg LSCHLv2 has one 16x 512MBit, whereas
the LSXHL has two 8x 1GBit dram chips. And of course some memory
parameters are different.

[..snip..]


>> +     return 0;
>> +}
>> +
>> +#ifdef CONFIG_MISC_INIT_R
>> +void check_enetaddr(void)
>> +{
>> +     uchar enetaddr[6];
>> +
>> +     if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
>> +             /* signal unset/invalid ethaddr to user */
>> +             set_led(LED_INFO_BLINKING);
>> +     }
>> +}
>> +
>> +static void erase_environment(void)
>
> Why do you need this function?

Mh? To erase the environment; I don't think that is the answer you wanted
to know ;) Remember the only recovery method for a totally messed up
environment is:
 - push button longer than 10s -> erases the environment, resets the board
 - push button longer than 3s -> boots into rescue mode, eg. set temporary
enetaddr and enable netconsole.

So i can't rely on a functional environment, that is i can't run stored
commands. Another way would be to run a command directly, eg.
  run("sf probe 0 && sf erase 70000 +10000 && reset")

dunno if that is better, back then i felt like hardcoding is better. Esp.
since there may be some side effects if some special environment variables
are set. Eg. there may be the spi speed set in the environment. I don't
know if this is true now, but i guess one may come up with such a feature.
Then this might break my recovery procedure.

>> +{
>> +     struct spi_flash *flash;
>> +
>> +     printf("Erasing environment..\n");
>> +     flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
>> +     if (!flash) {
>> +             printf("Erasing flash failed\n");
>> +             return;
>> +     }
>> +
>> +     spi_flash_erase(flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE);
>> +     spi_flash_free(flash);
>> +     do_reset(NULL, 0, 0, NULL);
>> +}
>> +
>> +static void rescue_mode(void)
>> +{
>> +     uchar enetaddr[6];
>> +
>> +     printf("Entering rescue mode..\n");
>> +     if (!eth_getenv_enetaddr_by_index("eth", 0, enetaddr)) {
>> +             eth_random_enetaddr(enetaddr);
>> +             if (eth_setenv_enetaddr_by_index("eth", 0, enetaddr)) {
>> +                     printf("Failed to set ethernet address\n");
>> +                             set_led(LED_ALARM_BLINKING);
>> +                     return;
>> +             }
>> +     }
>> +     setenv("bootsource", "rescue");
>> +}
>> +
>> +static void check_push_button(void)
>> +{
>> +     int i = 0;
>> +
>> +     while (!kw_gpio_get_value(GPIO_FUNC_BUTTON)) {
>> +             udelay(100000);
>> +             i++;
>> +
>> +             if (i == 10)
>> +                     set_led(LED_INFO_ON);
>> +
>> +             if (i >= 100) {
>> +                     set_led(LED_INFO_BLINKING);
>> +                     break;
>> +             }
>> +     }
>> +
>> +     if (i >= 100)
>> +             erase_environment();
>> +     else if (i >= 10)
>> +             rescue_mode();
>> +}
>
> You can overload this functionality to Reset key, you don't need any
> supporting code for the same, you can handle it through additional
> environment variables.
> For more info check for "SYSTSTn Duration counter support" in
> Kirkwood/cpu.c

I saw that code, but unfortunately this is not the reset button.


>> +
>> +int misc_init_r(void)
>> +{
>> +     check_enetaddr();
> This need to be ifdefed with CONFIG_MISC_INIT_R

it is, see above. check_enetaddr() and check_push_button() are guarded, too.

>> +     check_push_button();
>> +
>> +     return 0;
>> +}
>> +#endif
>> +

[..snip..]

>> +/*
>> + *  Environment variables configurations
>> + */
>> +#ifdef CONFIG_SPI_FLASH
>> +#define CONFIG_SYS_MAX_FLASH_BANKS   1
>> +#define CONFIG_SYS_MAX_FLASH_SECT    8
>> +#define CONFIG_ENV_IS_IN_SPI_FLASH   1
>> +#define CONFIG_ENV_SECT_SIZE         0x10000 /* 64K */
>> +#else
>> +#define CONFIG_ENV_IS_NOWHERE
>> +#endif
>> +
>> +#define CONFIG_ENV_SIZE                      0x10000 /* 64k */
>> +#define CONFIG_ENV_OFFSET            0x70000 /* env starts here */
>
> Why this is too far, what it u-boot.bin size?

Thats the original flash layout, 0x0-0x6ffff is uboot and 0x70000-0x7ffff
is  environment. ATM uboot size is around 40000 (hex) bytes.

-- 
michael

[U-Boot] [PATCH v5 5/5] Kirkwood: add lschlv2 and lsxhl board support

[Michael Walle]

Am Donnerstag 24 Mai 2012, 09:24:40 schrieb Prafulla Wadaskar:
> > +/*
> > + * Version number information
> > + */
> > +#if defined(CONFIG_LSCHLV2)
> > +#define CONFIG_IDENT_STRING " LS-CHLv2"
> > +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-
> > lschl.cfg
> > +#define CONFIG_MACH_TYPE 3006
> > +#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> > +#elif defined(CONFIG_LSXHL)
> > +#define CONFIG_IDENT_STRING " LS-XHL"
> > +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-
> > lsxhl.cfg
> > +#define CONFIG_MACH_TYPE 2663
> 
> From where these number are coming for MACH_TYPE?

Sorry forgot to answer that. They come from here:
  http://www.arm.linux.org.uk/developer/machines/download.php

-- 
Michael

[U-Boot] [PATCH v5 0/5] Kirkwood: add lschlv2 and lsxhl board support

[Prafulla Wadaskar]

> -----Original Message-----
> From: Michael Walle [mailto:michael at walle.cc]
> Sent: 12 May 2012 04:21
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar; Wolfgang Denk; Mike Frysinger; Joe Hershberger;
> Michael Walle
> Subject: [PATCH v5 0/5] Kirkwood: add lschlv2 and lsxhl board support
> 
> Changes:
> v5:
>  - combine patchset again. the "net: *" patches should be individually
>    acked by net custodian

Hi Joe,
I have not issues pulling this patch series but most of the patches are going for net related changes.

I would like you have your final ack on these.

Regards..
Prafulla . . .

[U-Boot] [PATCH v5 0/5] Kirkwood: add lschlv2 and lsxhl board support

[Joe Hershberger]

Hi Prafulla,

On Fri, May 25, 2012 at 9:13 AM, Prafulla Wadaskar <prafulla@marvell.com> wrote:
>> -----Original Message-----
>> From: Michael Walle [mailto:michael at walle.cc]
>> Sent: 12 May 2012 04:21
>> To: u-boot at lists.denx.de
>> Cc: Prafulla Wadaskar; Wolfgang Denk; Mike Frysinger; Joe Hershberger;
>> Michael Walle
>> Subject: [PATCH v5 0/5] Kirkwood: add lschlv2 and lsxhl board support
>>
>> Changes:
>> v5:
>> ?- combine patchset again. the "net: *" patches should be individually
>> ? ?acked by net custodian
>
> Hi Joe,
> I have not issues pulling this patch series but most of the patches are going for net related changes.
>
> I would like you have your final ack on these.

OK.  I'll have a look again.

-Joe