[U-Boot] [PATCH] net/designware: Add-on: Consecutive writes must have delay

[Wolfgang Denk <wd@denx.de>]

Dear Dinh,

In message <1339104480-6191-1-git-send-email-dinguyen@altera.com> you wrote:
> This commit is an add-on to f6c4191f. There are a few other registers where
> consecutive writes must have a delay.

Sorry, but this commit message is misleading - I was expecting to see
something like udelay() in the code, but there wasn't any...

> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> ---
>  drivers/net/designware.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> index e8e669b..34952c0 100644
> --- a/drivers/net/designware.c
> +++ b/drivers/net/designware.c
> @@ -163,8 +163,8 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
>  	writel(FIXEDBURST | PRIORXTX_41 | BURST_16,
>  			&dma_p->busmode);
>  
> -	writel(FLUSHTXFIFO | readl(&dma_p->opmode), &dma_p->opmode);
> -	writel(STOREFORWARD | TXSECONDFRAME, &dma_p->opmode);
> +	writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | \
> +		TXSECONDFRAME, &dma_p->opmode);

There is no need for the continuation line here; please drop the
backslash.

Hm... Should we not rather use something like setbits_le32() here?


Best regards,

Wolfgang Denk

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