[U-Boot] [PATCH v3 11/14] tegra20: Remove CPU init code from tegra20 u-boot

Simon Glass
2012-06-12T00:15:07Z

Hi Allen,

On Mon, Jun 11, 2012 at 3:53 PM, Allen Martin <amartin@nvidia.com> wrote:

> On Sat, Jun 09, 2012 at 12:19:48PM -0700, Simon Glass wrote:
> > Hi Allen,
> >
> > On Fri, Jun 8, 2012 at 2:16 PM, Allen Martin <amartin@nvidia.com<mailto:
> amartin at nvidia.com>> wrote:
> > This code is now included in the tegra20 SPL
> >
> > Signed-off-by: Allen Martin <amartin@nvidia.com<mailto:
> amartin at nvidia.com>>
> > ---
> > arch/arm/cpu/armv7/start.S | 2 -
> > arch/arm/cpu/tegra20-common/ap20.c | 258
> +----------------------------------
> > arch/arm/cpu/tegra20-common/board.c | 23 +---
> > include/configs/tegra20-common.h | 4 -
> > 4 files changed, 4 insertions(+), 283 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> > index 5b88c55..786152f 100644
> > --- a/arch/arm/cpu/armv7/start.S
> > +++ b/arch/arm/cpu/armv7/start.S
> > @@ -347,27 +114,8 @@ void init_pmc_scratch(void)
> > writel(odmdata, &pmc->pmc_scratch20);
> > }
> >
> > -void tegra20_start(void)
> > +void lowlevel_init(void)
> > {
> > - struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr
> *)NV_PA_APB_MISC_BASE;
> > -
> > - /* If we are the AVP, start up the first Cortex-A9 */
> > - if (!ap20_cpu_is_cortexa9()) {
> > - /* enable JTAG */
> > - writel(0xC0, &pmt->pmt_cfg_ctl);
> > -
> > - /*
> > - * If we are ARM7 - give it a different stack. We are
> about to
> > - * start up the A9 which will want to use this one.
> > - */
> > - asm volatile("mov sp, %0\n"
> > - : : "r"(AVP_EARLY_BOOT_STACK_LIMIT));
> > -
> > - start_cpu((u32)_start);
> > - halt_avp();
> > - /* not reached */
> > - }
> > -
> > /* Init PMC scratch memory */
> > init_pmc_scratch();
> >
> > There is a FIXME comment immediately after this:
> >
> > /* FIXME: should have ap20's L2 disabled too? */
> >
> > Does this still apply?
>
> I'm not sure what the origin of that comment was, but AFAIK the L2
> will always be disabled on reset until we explicitly enable it, so I'm
> not sure what the comment is referring to.
>

OK, neither am I.

>
> >
> > diff --git a/arch/arm/cpu/tegra20-common/board.c
> b/arch/arm/cpu/tegra20-common/board.c
> > index 70e5373..74610e5 100644
> > --- a/arch/arm/cpu/tegra20-common/board.c
> > +++ b/arch/arm/cpu/tegra20-common/board.c
> > @@ -23,12 +23,12 @@
> >
> > #include <common.h>
> > #include <asm/io.h>
> > -#include <asm/arch/ap20.h>
> > #include <asm/arch/clock.h>
> > #include <asm/arch/funcmux.h>
> > #include <asm/arch/pmc.h>
> > #include <asm/arch/sys_proto.h>
> > #include <asm/arch/tegra20.h>
> > +#include <asm/arch/warmboot.h>
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -85,27 +85,6 @@ int checkboard(void)
> > }
> > #endif /* CONFIG_DISPLAY_BOARDINFO */
> >
> > -#ifdef CONFIG_ARCH_CPU_INIT
> > -/*
> > - * Note this function is executed by the ARM7TDMI AVP. It does not
> return
> > - * in this case. It is also called once the A9 starts up, but does
> nothing in
> > - * that case.
> > - */
> > -int arch_cpu_init(void)
> > -{
> > - /* Fire up the Cortex A9 */
> > - tegra20_start();
> > -
> > - /* We didn't do this init in start.S, so do it now */
> > - cpu_init_cp15();
> > -
> > - /* Initialize essential common plls */
> > - clock_early_init();
> >
> > What happens to clock_early_init() with this patch? Is it called
> somewhere else?
>
> Yes, it gets called from the SPL now in board_init_r()
> arch/arm/cpu/arm720t/tegra20/spl.c
>

OK I see. But I think clock_early_init() must be called from main U-Boot
also, in case there is no SPL (e.g. using with JTAG).

>
> -Allen
> --
> nvpublic
>

Regards,
Simon