[U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg

[Marek Vasut <marex@denx.de>]

Dear Vikram Narayanan,

> Hello Marek,
> 
> On 6/13/2012 5:57 PM, Marek Vasut wrote:
> > Dear Vikram Narayanan,
> > 
> >> If in case this is valid according to the latest datasheet, ignore this
> >> patch.
> >> 
> >> --
> >> According to REV C manual, the register IOMUXC_IOMUXC_GPR4 has
> >> bits 4 and 5 read-only and the value is always set as zero.
> >> So write '0' to these bits instead of writing '1'.
> > 
> > I'm acking this as writing 0 to read-only bits is the only rightous thing
> > to do. btw. how did you find this? Good catch, praise on you :-)
> :
> :)
> 
> In the middle of writing a imximage.cfg file for a custom mx6 board.

So it did manifest somehow?

> Regards,
> Vikram
> 
> > Acked-by: Marek Vasut<marex@denx.de>
> > 
> >> Signed-off-by: Vikram Narayanan<vikram186@gmail.com>
> >> Cc: Jason Liu<r64343@freescale.com>
> >> Cc: Dirk Behme<dirk.behme@googlemail.com>
> >> ---
> >> 
> >>   board/freescale/mx6qarm2/imximage.cfg      |    2 +-
> >>   board/freescale/mx6qsabrelite/imximage.cfg |    2 +-
> >>   2 files changed, 2 insertions(+), 2 deletions(-)
> >> 
> >> diff --git a/board/freescale/mx6qarm2/imximage.cfg
> >> b/board/freescale/mx6qarm2/imximage.cfg index ceecbf9..bf941a3 100644
> >> --- a/board/freescale/mx6qarm2/imximage.cfg
> >> +++ b/board/freescale/mx6qarm2/imximage.cfg
> >> @@ -167,7 +167,7 @@ DATA 4 0x020c407c 0x0F0000C3
> >> 
> >>   DATA 4 0x020c4080 0x000003FF
> >>   
> >>   # enable AXI cache for VDOA/VPU/IPU
> >> 
> >> -DATA 4 0x020e0010 0xF00000FF
> >> +DATA 4 0x020e0010 0xF00000CF
> >> 
> >>   # set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
> >>   DATA 4 0x020e0018 0x007F007F
> >>   DATA 4 0x020e001c 0x007F007F
> >> 
> >> diff --git a/board/freescale/mx6qsabrelite/imximage.cfg
> >> b/board/freescale/mx6qsabrelite/imximage.cfg index c389427..62498ab
> >> 100644 --- a/board/freescale/mx6qsabrelite/imximage.cfg
> >> +++ b/board/freescale/mx6qsabrelite/imximage.cfg
> >> @@ -164,7 +164,7 @@ DATA 4 0x020c407c 0x0F0000C3
> >> 
> >>   DATA 4 0x020c4080 0x000003FF
> >>   
> >>   # enable AXI cache for VDOA/VPU/IPU
> >> 
> >> -DATA 4 0x020e0010 0xF00000FF
> >> +DATA 4 0x020e0010 0xF00000CF
> >> 
> >>   # set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
> >>   DATA 4 0x020e0018 0x007F007F
> >>   DATA 4 0x020e001c 0x007F007F
> > 
> > Best regards,
> > Marek Vasut

Best regards,
Marek Vasut