From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ARM: support for cache coherent allocations
Date: Sat, 16 Jun 2012 00:29:23 +0200 [thread overview]
Message-ID: <201206160029.23925.marek.vasut@gmail.com> (raw)
In-Reply-To: <1338414113-25281-1-git-send-email-ilya.yanok@cogentembedded.com>
Dear Ilya Yanok,
> This is a draft implementation of cache coherent memory allocator.
> This simple implementation just reserves memory area below malloc
> space and leave it uncached even if data cache is enabled.
> Allocations are even simpler: code just verifies that we have
> enough space and increments the offset counter. No deallocations
> supported for now. In future versions we could probably use
> dlmalloc allocator to get space out of coherent pool.
>
> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Hm, can't we just punch a hole in the MMU table at runtime instead of
preallocating it like this?
Also, what is this for? Can we not simply flush/invalidate the caches?
Best regards,
Marek Vasut
next prev parent reply other threads:[~2012-06-15 22:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-30 21:41 [U-Boot] [PATCH] ARM: support for cache coherent allocations Ilya Yanok
2012-06-14 15:13 ` Ilya Yanok
2012-06-15 17:34 ` Tom Rini
2012-06-15 22:29 ` Marek Vasut [this message]
2012-06-18 18:15 ` Ilya Yanok
2012-06-18 23:37 ` Marek Vasut
2012-06-19 14:32 ` Ilya Yanok
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