* [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h
@ 2012-06-26 18:49 Marek Vasut
2012-06-26 18:49 ` [U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71 Marek Vasut
` (2 more replies)
0 siblings, 3 replies; 23+ messages in thread
From: Marek Vasut @ 2012-06-26 18:49 UTC (permalink / raw)
To: u-boot
Also add the CPUCS register definition.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Wolfgang Denk <wd@denx.de>
---
arch/arm/cpu/arm926ejs/kirkwood/dram.c | 2 --
arch/arm/include/asm/arch-kirkwood/kirkwood.h | 9 +++++++++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
index 181b3e7..ccb6b03 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
@@ -30,8 +30,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + (x * 0x08))
-#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08))
/*
* kw_sdram_bar - reads SDRAM Base Address Register
*/
diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
index 47771d5..33ae827 100644
--- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
+++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
@@ -77,6 +77,15 @@
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
+/* Kirkwood memory registers */
+#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + ((x) * 0x08))
+#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + ((x) * 0x08))
+
+#define KW_REG_CPUCS_WIN_ENABLE (1 << 0)
+#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1)
+#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2)
+#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24)
+
#if defined (CONFIG_KW88F6281)
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)
--
1.7.10
^ permalink raw reply related [flat|nested] 23+ messages in thread* [U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71 2012-06-26 18:49 [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Marek Vasut @ 2012-06-26 18:49 ` Marek Vasut 2012-06-27 12:02 ` [U-Boot] [PATCH 2/2 V2] " Marek Vasut 2012-06-29 10:02 ` [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Gerlando Falauto 2012-06-29 11:37 ` [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() Gerlando Falauto 2 siblings, 1 reply; 23+ messages in thread From: Marek Vasut @ 2012-06-26 18:49 UTC (permalink / raw) To: u-boot Signed-off-by: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de> --- board/karo/tk71/Makefile | 45 +++++++++++ board/karo/tk71/kwbimage.cfg | 174 ++++++++++++++++++++++++++++++++++++++++++ board/karo/tk71/tk71.c | 174 ++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/tk71.h | 128 +++++++++++++++++++++++++++++++ 5 files changed, 522 insertions(+) create mode 100644 board/karo/tk71/Makefile create mode 100644 board/karo/tk71/kwbimage.cfg create mode 100644 board/karo/tk71/tk71.c create mode 100644 include/configs/tk71.h diff --git a/board/karo/tk71/Makefile b/board/karo/tk71/Makefile new file mode 100644 index 0000000..934e391 --- /dev/null +++ b/board/karo/tk71/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2012 Marek Vasut <marex@denx.de> +# on behalf of DENX Software Engineering GmbH +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := tk71.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg new file mode 100644 index 0000000..0166826 --- /dev/null +++ b/board/karo/tk71/kwbimage.cfg @@ -0,0 +1,174 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# adopted to TK71 by +# Nils Faerber <nils.faerber@kernelconcepts.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x36543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x1101355b # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000034 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x00000000 # DDR Address Control +# bit1-0: 01, Cs0width=x16 +# bit3-2: 10, Cs0size=512Mb +# bit5-4: 01, Cs1width=x16 +# bit7-6: 10, Cs1size=512Mb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000652 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000042 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x1FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x00000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x00000000 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00110000 # DDR ODT Control (Low) +# bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1 +# bit7-4: 0001, (read) M_ODT[1] is asserted during read from DRAM CS0 +# bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1. +# bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0. +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000F80F # CPU ODT Control +# bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3 +# bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm +# bit13-12: 10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm +# bit14: 1, M_STARTBURST_IN ODT: Enabled +# bit15: 1, DDR IO ODT Unit: Use ODT block +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c new file mode 100644 index 0000000..ba4b56f --- /dev/null +++ b/board/karo/tk71/tk71.c @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define TK71_OE_LOW (~0) +#define TK71_OE_HIGH (~0) +#define TK71_OE_VAL_LOW (0) +#define TK71_OE_VAL_HIGH (0) + +int board_early_init_f(void) +{ + unsigned long size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + + /* 256MB module, adjust BAR register */ + if (size == 256 * 1024 * 1024) { + writel(KW_REG_CPUCS_WIN_ENABLE | KW_REG_CPUCS_WIN_SIZE(0xf), + KW_REG_CPUCS_WIN_SZ(0)); + } + + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(TK71_OE_VAL_LOW, + TK71_OE_VAL_HIGH, + TK71_OE_LOW, TK71_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + return 0; +} + +int board_init(void) +{ + /* + * arch number of board + */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_NET + +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +static void mv_phy_88e1118_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1118 Initialized on %s\n", name); +} + +/* Configure and enable Switch and PHY */ +void reset_phy(void) +{ + /* configure and initialize PHY */ + mv_phy_88e1118_init("egiga0"); + +} +#endif diff --git a/boards.cfg b/boards.cfg index a723f67..88e3dbf 100644 --- a/boards.cfg +++ b/boards.cfg @@ -156,6 +156,7 @@ rd6281a arm arm926ejs - Marvell sheevaplug arm arm926ejs - Marvell kirkwood ib62x0 arm arm926ejs ib62x0 raidsonic kirkwood dockstar arm arm926ejs - Seagate kirkwood +tk71 arm arm926ejs tk71 karo kirkwood devkit3250 arm arm926ejs devkit3250 timll lpc32xx jadecpu arm arm926ejs jadecpu syteco mb86r0x mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg diff --git a/include/configs/tk71.h b/include/configs/tk71.h new file mode 100644 index 0000000..db2c975 --- /dev/null +++ b/include/configs/tk71.h @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __CONFIG_TK71_H__ +#define __CONFIG_TK71_H__ + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nKa-Ro TK71" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_NR_DRAM_BANKS 1 + +#define MACH_TYPE_TK71 2399 +#define CONFIG_MACH_TYPE MACH_TYPE_TK71 + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT + +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * NAND flash + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_JFFS2_NAND +#define CONFIG_JFFS2_DEV "nand0,3" +#endif + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} +#define CONFIG_PHY_BASE_ADR 0x08 +#endif + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_KIRKWOOD +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_ADDR 0x80000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "nand read 0x800000 kernel 0x300000; bootm;" +#define CONFIG_MTDPARTS "512K(u-boot),512K(u-boot-env),3M(kernel),-(root)" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_uboot=dhcp u-boot.kwb; nand erase.part u-boot; nand write ${fileaddr} u-boot ${filesize}\0" \ + "update_kernel=dhcp uImage-tk71; nand erase.part kernel; nand write ${fileaddr} kernel ${filesize} \0" \ + "update_rootfs=dhcp rootfs-tk71; nand erase.part root; nand write ${fileaddr} root ${filesize}\0" \ + "update_all=run update_uboot; run update_kernel; run update_rootfs; reset\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts=mtdparts=orion_nand:"CONFIG_MTDPARTS"\0" \ + "bootargs=console=ttyS0,115200 mtdparts=orion_nand:"CONFIG_MTDPARTS" rootfstype=jffs2 root=/dev/mtdblock3 rw\0" +#define MTDIDS_DEFAULT "nand0=orion_nand" +#define MTDPARTS_DEFAULT "mtdparts=orion_nand:"CONFIG_MTDPARTS + +#define PHYS_SDRAM_1 0x00000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ + +#endif /* __CONFIG_TK71_H__ */ -- 1.7.10 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 2012-06-26 18:49 ` [U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71 Marek Vasut @ 2012-06-27 12:02 ` Marek Vasut 2012-07-03 11:43 ` Prafulla Wadaskar ` (3 more replies) 0 siblings, 4 replies; 23+ messages in thread From: Marek Vasut @ 2012-06-27 12:02 UTC (permalink / raw) To: u-boot Signed-off-by: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de> --- board/karo/tk71/Makefile | 45 +++++++++++ board/karo/tk71/kwbimage.cfg | 174 ++++++++++++++++++++++++++++++++++++++++++ board/karo/tk71/tk71.c | 174 ++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ 5 files changed, 524 insertions(+) create mode 100644 board/karo/tk71/Makefile create mode 100644 board/karo/tk71/kwbimage.cfg create mode 100644 board/karo/tk71/tk71.c create mode 100644 include/configs/tk71.h V2: Enable hush parser diff --git a/board/karo/tk71/Makefile b/board/karo/tk71/Makefile new file mode 100644 index 0000000..934e391 --- /dev/null +++ b/board/karo/tk71/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2012 Marek Vasut <marex@denx.de> +# on behalf of DENX Software Engineering GmbH +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := tk71.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg new file mode 100644 index 0000000..0166826 --- /dev/null +++ b/board/karo/tk71/kwbimage.cfg @@ -0,0 +1,174 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# adopted to TK71 by +# Nils Faerber <nils.faerber@kernelconcepts.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x36543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x1101355b # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000034 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x00000000 # DDR Address Control +# bit1-0: 01, Cs0width=x16 +# bit3-2: 10, Cs0size=512Mb +# bit5-4: 01, Cs1width=x16 +# bit7-6: 10, Cs1size=512Mb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000652 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000042 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x1FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x00000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x00000000 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00110000 # DDR ODT Control (Low) +# bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1 +# bit7-4: 0001, (read) M_ODT[1] is asserted during read from DRAM CS0 +# bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1. +# bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0. +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000F80F # CPU ODT Control +# bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3 +# bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm +# bit13-12: 10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm +# bit14: 1, M_STARTBURST_IN ODT: Enabled +# bit15: 1, DDR IO ODT Unit: Use ODT block +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c new file mode 100644 index 0000000..ba4b56f --- /dev/null +++ b/board/karo/tk71/tk71.c @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define TK71_OE_LOW (~0) +#define TK71_OE_HIGH (~0) +#define TK71_OE_VAL_LOW (0) +#define TK71_OE_VAL_HIGH (0) + +int board_early_init_f(void) +{ + unsigned long size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + + /* 256MB module, adjust BAR register */ + if (size == 256 * 1024 * 1024) { + writel(KW_REG_CPUCS_WIN_ENABLE | KW_REG_CPUCS_WIN_SIZE(0xf), + KW_REG_CPUCS_WIN_SZ(0)); + } + + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(TK71_OE_VAL_LOW, + TK71_OE_VAL_HIGH, + TK71_OE_LOW, TK71_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + return 0; +} + +int board_init(void) +{ + /* + * arch number of board + */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_NET + +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +static void mv_phy_88e1118_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1118 Initialized on %s\n", name); +} + +/* Configure and enable Switch and PHY */ +void reset_phy(void) +{ + /* configure and initialize PHY */ + mv_phy_88e1118_init("egiga0"); + +} +#endif diff --git a/boards.cfg b/boards.cfg index a723f67..88e3dbf 100644 --- a/boards.cfg +++ b/boards.cfg @@ -156,6 +156,7 @@ rd6281a arm arm926ejs - Marvell sheevaplug arm arm926ejs - Marvell kirkwood ib62x0 arm arm926ejs ib62x0 raidsonic kirkwood dockstar arm arm926ejs - Seagate kirkwood +tk71 arm arm926ejs tk71 karo kirkwood devkit3250 arm arm926ejs devkit3250 timll lpc32xx jadecpu arm arm926ejs jadecpu syteco mb86r0x mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg diff --git a/include/configs/tk71.h b/include/configs/tk71.h new file mode 100644 index 0000000..f929f20 --- /dev/null +++ b/include/configs/tk71.h @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __CONFIG_TK71_H__ +#define __CONFIG_TK71_H__ + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nKa-Ro TK71" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_NR_DRAM_BANKS 1 + +#define MACH_TYPE_TK71 2399 +#define CONFIG_MACH_TYPE MACH_TYPE_TK71 + +/* + * Commands configuration + */ +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT + +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * NAND flash + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_JFFS2_NAND +#define CONFIG_JFFS2_DEV "nand0,3" +#endif + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} +#define CONFIG_PHY_BASE_ADR 0x08 +#endif + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_KIRKWOOD +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_ADDR 0x80000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "nand read 0x800000 kernel 0x300000; bootm;" +#define CONFIG_MTDPARTS "512K(u-boot),512K(u-boot-env),3M(kernel),-(root)" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_uboot=dhcp u-boot.kwb; nand erase.part u-boot; nand write ${fileaddr} u-boot ${filesize}\0" \ + "update_kernel=dhcp uImage-tk71; nand erase.part kernel; nand write ${fileaddr} kernel ${filesize} \0" \ + "update_rootfs=dhcp rootfs-tk71; nand erase.part root; nand write ${fileaddr} root ${filesize}\0" \ + "update_all=run update_uboot; run update_kernel; run update_rootfs; reset\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts=mtdparts=orion_nand:"CONFIG_MTDPARTS"\0" \ + "bootargs=console=ttyS0,115200 mtdparts=orion_nand:"CONFIG_MTDPARTS" rootfstype=jffs2 root=/dev/mtdblock3 rw\0" +#define MTDIDS_DEFAULT "nand0=orion_nand" +#define MTDPARTS_DEFAULT "mtdparts=orion_nand:"CONFIG_MTDPARTS + +#define PHYS_SDRAM_1 0x00000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ + +#endif /* __CONFIG_TK71_H__ */ -- 1.7.10 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 2012-06-27 12:02 ` [U-Boot] [PATCH 2/2 V2] " Marek Vasut @ 2012-07-03 11:43 ` Prafulla Wadaskar 2012-07-03 11:56 ` Prafulla Wadaskar ` (2 subsequent siblings) 3 siblings, 0 replies; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-03 11:43 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Marek Vasut [mailto:marex at denx.de] > Sent: 27 June 2012 17:33 > To: u-boot at lists.denx.de > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > Subject: [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Prafulla Wadaskar <prafulla@marvell.com> > Cc: Wolfgang Denk <wd@denx.de> > --- > board/karo/tk71/Makefile | 45 +++++++++++ > board/karo/tk71/kwbimage.cfg | 174 > ++++++++++++++++++++++++++++++++++++++++++ > board/karo/tk71/tk71.c | 174 > ++++++++++++++++++++++++++++++++++++++++++ > boards.cfg | 1 + > include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ > 5 files changed, 524 insertions(+) > create mode 100644 board/karo/tk71/Makefile > create mode 100644 board/karo/tk71/kwbimage.cfg > create mode 100644 board/karo/tk71/tk71.c > create mode 100644 include/configs/tk71.h > > V2: Enable hush parser > Applied to u-boot-marvell.git master branch Regards... Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 2012-06-27 12:02 ` [U-Boot] [PATCH 2/2 V2] " Marek Vasut 2012-07-03 11:43 ` Prafulla Wadaskar @ 2012-07-03 11:56 ` Prafulla Wadaskar 2012-07-03 12:08 ` Prafulla Wadaskar 2012-07-03 12:27 ` [U-Boot] [PATCH V3 2/2] " Marek Vasut 3 siblings, 0 replies; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-03 11:56 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Prafulla Wadaskar > Sent: 03 July 2012 17:14 > To: 'Marek Vasut'; u-boot at lists.denx.de > Cc: Wolfgang Denk > Subject: RE: [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 > > > > > -----Original Message----- > > From: Marek Vasut [mailto:marex at denx.de] > > Sent: 27 June 2012 17:33 > > To: u-boot at lists.denx.de > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > Subject: [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > Cc: Prafulla Wadaskar <prafulla@marvell.com> > > Cc: Wolfgang Denk <wd@denx.de> > > --- > > board/karo/tk71/Makefile | 45 +++++++++++ > > board/karo/tk71/kwbimage.cfg | 174 > > ++++++++++++++++++++++++++++++++++++++++++ > > board/karo/tk71/tk71.c | 174 > > ++++++++++++++++++++++++++++++++++++++++++ > > boards.cfg | 1 + > > include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ > > 5 files changed, 524 insertions(+) > > create mode 100644 board/karo/tk71/Makefile > > create mode 100644 board/karo/tk71/kwbimage.cfg > > create mode 100644 board/karo/tk71/tk71.c > > create mode 100644 include/configs/tk71.h > > > > V2: Enable hush parser > > > > Applied to u-boot-marvell.git master branch Sorry Marek, I have reverted it, we need to tune it further Regards... Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 2012-06-27 12:02 ` [U-Boot] [PATCH 2/2 V2] " Marek Vasut 2012-07-03 11:43 ` Prafulla Wadaskar 2012-07-03 11:56 ` Prafulla Wadaskar @ 2012-07-03 12:08 ` Prafulla Wadaskar 2012-07-03 12:23 ` Marek Vasut 2012-07-03 12:27 ` [U-Boot] [PATCH V3 2/2] " Marek Vasut 3 siblings, 1 reply; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-03 12:08 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Marek Vasut [mailto:marex at denx.de] > Sent: 27 June 2012 17:33 > To: u-boot at lists.denx.de > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > Subject: [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Prafulla Wadaskar <prafulla@marvell.com> > Cc: Wolfgang Denk <wd@denx.de> > --- > board/karo/tk71/Makefile | 45 +++++++++++ > board/karo/tk71/kwbimage.cfg | 174 > ++++++++++++++++++++++++++++++++++++++++++ > board/karo/tk71/tk71.c | 174 > ++++++++++++++++++++++++++++++++++++++++++ > boards.cfg | 1 + > include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ > 5 files changed, 524 insertions(+) > create mode 100644 board/karo/tk71/Makefile > create mode 100644 board/karo/tk71/kwbimage.cfg > create mode 100644 board/karo/tk71/tk71.c > create mode 100644 include/configs/tk71.h > > V2: Enable hush parser > Hi Marek This patch give build error against u-boot-marvell.git master branch since kw_mpp_config() API is changes Also please consider the feedback from Gerlando Falauto - June 29, 2012, 10:27 a.m. Which even I find it more cleaner approach Ref : http://patchwork.ozlabs.org/patch/167436/ Pls kindly fix it and repost Regards... Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 12:08 ` Prafulla Wadaskar @ 2012-07-03 12:23 ` Marek Vasut 0 siblings, 0 replies; 23+ messages in thread From: Marek Vasut @ 2012-07-03 12:23 UTC (permalink / raw) To: u-boot Dear Prafulla Wadaskar, > > -----Original Message----- > > From: Marek Vasut [mailto:marex at denx.de] > > Sent: 27 June 2012 17:33 > > To: u-boot at lists.denx.de > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > Subject: [PATCH 2/2 V2] Kirkwood: Add support for Ka-Ro TK71 > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > Cc: Prafulla Wadaskar <prafulla@marvell.com> > > Cc: Wolfgang Denk <wd@denx.de> > > --- > > > > board/karo/tk71/Makefile | 45 +++++++++++ > > board/karo/tk71/kwbimage.cfg | 174 > > > > ++++++++++++++++++++++++++++++++++++++++++ > > > > board/karo/tk71/tk71.c | 174 > > > > ++++++++++++++++++++++++++++++++++++++++++ > > > > boards.cfg | 1 + > > include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ > > 5 files changed, 524 insertions(+) > > create mode 100644 board/karo/tk71/Makefile > > create mode 100644 board/karo/tk71/kwbimage.cfg > > create mode 100644 board/karo/tk71/tk71.c > > create mode 100644 include/configs/tk71.h > > > > V2: Enable hush parser > > Hi Marek > This patch give build error against u-boot-marvell.git master branch since > kw_mpp_config() API is changes Looks like this change didn't hit upstream uboot yet. > Also please consider the feedback from > Gerlando Falauto - June 29, 2012, 10:27 a.m. > Which even I find it more cleaner approach Did you get anywhere with the discussion? > Ref : http://patchwork.ozlabs.org/patch/167436/ > > Pls kindly fix it and repost > > Regards... > Prafulla . . . Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 2012-06-27 12:02 ` [U-Boot] [PATCH 2/2 V2] " Marek Vasut ` (2 preceding siblings ...) 2012-07-03 12:08 ` Prafulla Wadaskar @ 2012-07-03 12:27 ` Marek Vasut 2012-07-03 12:44 ` Prafulla Wadaskar 2012-07-03 13:02 ` [U-Boot] [PATCH 2/2 V4] " Marek Vasut 3 siblings, 2 replies; 23+ messages in thread From: Marek Vasut @ 2012-07-03 12:27 UTC (permalink / raw) To: u-boot Signed-off-by: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de> --- board/karo/tk71/Makefile | 45 +++++++++++ board/karo/tk71/kwbimage.cfg | 174 ++++++++++++++++++++++++++++++++++++++++++ board/karo/tk71/tk71.c | 174 ++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ 5 files changed, 524 insertions(+) create mode 100644 board/karo/tk71/Makefile create mode 100644 board/karo/tk71/kwbimage.cfg create mode 100644 board/karo/tk71/tk71.c create mode 100644 include/configs/tk71.h V2: Enable hush parser V3: Fixup kirkwood_mpp_conf() arguments diff --git a/board/karo/tk71/Makefile b/board/karo/tk71/Makefile new file mode 100644 index 0000000..934e391 --- /dev/null +++ b/board/karo/tk71/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2012 Marek Vasut <marex@denx.de> +# on behalf of DENX Software Engineering GmbH +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := tk71.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg new file mode 100644 index 0000000..0166826 --- /dev/null +++ b/board/karo/tk71/kwbimage.cfg @@ -0,0 +1,174 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# adopted to TK71 by +# Nils Faerber <nils.faerber@kernelconcepts.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x36543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x1101355b # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000034 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x00000000 # DDR Address Control +# bit1-0: 01, Cs0width=x16 +# bit3-2: 10, Cs0size=512Mb +# bit5-4: 01, Cs1width=x16 +# bit7-6: 10, Cs1size=512Mb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000652 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000042 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x1FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x00000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x00000000 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00110000 # DDR ODT Control (Low) +# bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1 +# bit7-4: 0001, (read) M_ODT[1] is asserted during read from DRAM CS0 +# bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1. +# bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0. +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000F80F # CPU ODT Control +# bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3 +# bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm +# bit13-12: 10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm +# bit14: 1, M_STARTBURST_IN ODT: Enabled +# bit15: 1, DDR IO ODT Unit: Use ODT block +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c new file mode 100644 index 0000000..50b563e --- /dev/null +++ b/board/karo/tk71/tk71.c @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define TK71_OE_LOW (~0) +#define TK71_OE_HIGH (~0) +#define TK71_OE_VAL_LOW (0) +#define TK71_OE_VAL_HIGH (0) + +int board_early_init_f(void) +{ + unsigned long size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + + /* 256MB module, adjust BAR register */ + if (size == 256 * 1024 * 1024) { + writel(KW_REG_CPUCS_WIN_ENABLE | KW_REG_CPUCS_WIN_SIZE(0xf), + KW_REG_CPUCS_WIN_SZ(0)); + } + + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(TK71_OE_VAL_LOW, + TK71_OE_VAL_HIGH, + TK71_OE_LOW, TK71_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config, NULL); + + return 0; +} + +int board_init(void) +{ + /* + * arch number of board + */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_NET + +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +static void mv_phy_88e1118_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1118 Initialized on %s\n", name); +} + +/* Configure and enable Switch and PHY */ +void reset_phy(void) +{ + /* configure and initialize PHY */ + mv_phy_88e1118_init("egiga0"); + +} +#endif diff --git a/boards.cfg b/boards.cfg index d33ff27..a423555 100644 --- a/boards.cfg +++ b/boards.cfg @@ -158,6 +158,7 @@ rd6281a arm arm926ejs - Marvell sheevaplug arm arm926ejs - Marvell kirkwood ib62x0 arm arm926ejs ib62x0 raidsonic kirkwood dockstar arm arm926ejs - Seagate kirkwood +tk71 arm arm926ejs tk71 karo kirkwood devkit3250 arm arm926ejs devkit3250 timll lpc32xx jadecpu arm arm926ejs jadecpu syteco mb86r0x mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg diff --git a/include/configs/tk71.h b/include/configs/tk71.h new file mode 100644 index 0000000..f929f20 --- /dev/null +++ b/include/configs/tk71.h @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __CONFIG_TK71_H__ +#define __CONFIG_TK71_H__ + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nKa-Ro TK71" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_NR_DRAM_BANKS 1 + +#define MACH_TYPE_TK71 2399 +#define CONFIG_MACH_TYPE MACH_TYPE_TK71 + +/* + * Commands configuration + */ +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT + +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * NAND flash + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_JFFS2_NAND +#define CONFIG_JFFS2_DEV "nand0,3" +#endif + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} +#define CONFIG_PHY_BASE_ADR 0x08 +#endif + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_KIRKWOOD +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_ADDR 0x80000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "nand read 0x800000 kernel 0x300000; bootm;" +#define CONFIG_MTDPARTS "512K(u-boot),512K(u-boot-env),3M(kernel),-(root)" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_uboot=dhcp u-boot.kwb; nand erase.part u-boot; nand write ${fileaddr} u-boot ${filesize}\0" \ + "update_kernel=dhcp uImage-tk71; nand erase.part kernel; nand write ${fileaddr} kernel ${filesize} \0" \ + "update_rootfs=dhcp rootfs-tk71; nand erase.part root; nand write ${fileaddr} root ${filesize}\0" \ + "update_all=run update_uboot; run update_kernel; run update_rootfs; reset\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts=mtdparts=orion_nand:"CONFIG_MTDPARTS"\0" \ + "bootargs=console=ttyS0,115200 mtdparts=orion_nand:"CONFIG_MTDPARTS" rootfstype=jffs2 root=/dev/mtdblock3 rw\0" +#define MTDIDS_DEFAULT "nand0=orion_nand" +#define MTDPARTS_DEFAULT "mtdparts=orion_nand:"CONFIG_MTDPARTS + +#define PHYS_SDRAM_1 0x00000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ + +#endif /* __CONFIG_TK71_H__ */ -- 1.7.10 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 12:27 ` [U-Boot] [PATCH V3 2/2] " Marek Vasut @ 2012-07-03 12:44 ` Prafulla Wadaskar 2012-07-03 12:51 ` Marek Vasut 2012-07-03 13:02 ` [U-Boot] [PATCH 2/2 V4] " Marek Vasut 1 sibling, 1 reply; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-03 12:44 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Marek Vasut [mailto:marex at denx.de] > Sent: 03 July 2012 17:58 > To: u-boot at lists.denx.de > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > Subject: [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Prafulla Wadaskar <prafulla@marvell.com> > Cc: Wolfgang Denk <wd@denx.de> ...snip... > diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c > new file mode 100644 > index 0000000..50b563e > --- /dev/null > +++ b/board/karo/tk71/tk71.c > @@ -0,0 +1,174 @@ > +/* > + * Copyright (C) 2012 Marek Vasut <marex@denx.de> > + * on behalf of DENX Software Engineering GmbH > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > + * MA 02110-1301 USA > + */ > + > +#include <common.h> > +#include <miiphy.h> > +#include <asm/arch/cpu.h> > +#include <asm/arch/kirkwood.h> > +#include <asm/arch/mpp.h> > +#include <asm/io.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +#define TK71_OE_LOW (~0) > +#define TK71_OE_HIGH (~0) > +#define TK71_OE_VAL_LOW (0) > +#define TK71_OE_VAL_HIGH (0) > + > +int board_early_init_f(void) > +{ > + unsigned long size = get_ram_size(PHYS_SDRAM_1, > PHYS_SDRAM_1_SIZE); > + > + /* 256MB module, adjust BAR register */ > + if (size == 256 * 1024 * 1024) { > + writel(KW_REG_CPUCS_WIN_ENABLE | KW_REG_CPUCS_WIN_SIZE(0xf), > + KW_REG_CPUCS_WIN_SZ(0)); > + } Hi Marek This is first patch to support this board series, so ideally you don't need further tuning of DRAM configuration, if you address it in kwbimage.cfg You may think of this approach if you have similar board support in future. Please post the patch w/o updating DRAM registers or Let's do it in cleaner way. macros are NOT encouraged to use for register definition. Regards... Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 12:44 ` Prafulla Wadaskar @ 2012-07-03 12:51 ` Marek Vasut 2012-07-03 13:00 ` Prafulla Wadaskar 0 siblings, 1 reply; 23+ messages in thread From: Marek Vasut @ 2012-07-03 12:51 UTC (permalink / raw) To: u-boot Dear Prafulla Wadaskar, > > -----Original Message----- > > From: Marek Vasut [mailto:marex at denx.de] > > Sent: 03 July 2012 17:58 > > To: u-boot at lists.denx.de > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > Subject: [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > Cc: Prafulla Wadaskar <prafulla@marvell.com> > > Cc: Wolfgang Denk <wd@denx.de> > > ...snip... > > > diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c > > new file mode 100644 > > index 0000000..50b563e > > --- /dev/null > > +++ b/board/karo/tk71/tk71.c > > @@ -0,0 +1,174 @@ > > +/* > > + * Copyright (C) 2012 Marek Vasut <marex@denx.de> > > + * on behalf of DENX Software Engineering GmbH > > + * > > + * See file CREDITS for list of people who contributed to this > > + * project. > > + * > > + * This program is free software; you can redistribute it and/or > > + * modify it under the terms of the GNU General Public License as > > + * published by the Free Software Foundation; either version 2 of > > + * the License, or (at your option) any later version. > > + * > > + * This program is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + * > > + * You should have received a copy of the GNU General Public License > > + * along with this program; if not, write to the Free Software > > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > > + * MA 02110-1301 USA > > + */ > > + > > +#include <common.h> > > +#include <miiphy.h> > > +#include <asm/arch/cpu.h> > > +#include <asm/arch/kirkwood.h> > > +#include <asm/arch/mpp.h> > > +#include <asm/io.h> > > + > > +DECLARE_GLOBAL_DATA_PTR; > > + > > +#define TK71_OE_LOW (~0) > > +#define TK71_OE_HIGH (~0) > > +#define TK71_OE_VAL_LOW (0) > > +#define TK71_OE_VAL_HIGH (0) > > + > > +int board_early_init_f(void) > > +{ > > + unsigned long size = get_ram_size(PHYS_SDRAM_1, > > PHYS_SDRAM_1_SIZE); > > + > > + /* 256MB module, adjust BAR register */ > > + if (size == 256 * 1024 * 1024) { > > + writel(KW_REG_CPUCS_WIN_ENABLE | KW_REG_CPUCS_WIN_SIZE(0xf), > > + KW_REG_CPUCS_WIN_SZ(0)); > > + } > > Hi Marek > This is first patch to support this board series, so ideally you don't need > further tuning of DRAM configuration, if you address it in kwbimage.cfg What do you mean adress is in kwbimage.cfg ? > You may think of this approach if you have similar board support in future. > > Please post the patch w/o updating DRAM registers or How exactly would you support the 256MB variant? > Let's do it in cleaner way. I already asked -- did you get anywhere with the cleaner approach? It's not even discussed properly yet, let alone implemented. > macros are NOT encouraged to use for register definition. What do you mean? > Regards... > Prafulla . . . Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 12:51 ` Marek Vasut @ 2012-07-03 13:00 ` Prafulla Wadaskar 2012-07-03 13:03 ` Marek Vasut 0 siblings, 1 reply; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-03 13:00 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Marek Vasut [mailto:marex at denx.de] > Sent: 03 July 2012 18:21 > To: Prafulla Wadaskar > Cc: u-boot at lists.denx.de; Wolfgang Denk > Subject: Re: [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 > > Dear Prafulla Wadaskar, > > > > -----Original Message----- > > > From: Marek Vasut [mailto:marex at denx.de] > > > Sent: 03 July 2012 17:58 > > > To: u-boot at lists.denx.de > > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > > Subject: [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 > > > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > > Cc: Prafulla Wadaskar <prafulla@marvell.com> > > > Cc: Wolfgang Denk <wd@denx.de> > > > > ...snip... > > > > > diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c > > > new file mode 100644 > > > index 0000000..50b563e > > > --- /dev/null > > > +++ b/board/karo/tk71/tk71.c > > > @@ -0,0 +1,174 @@ > > > +/* > > > + * Copyright (C) 2012 Marek Vasut <marex@denx.de> > > > + * on behalf of DENX Software Engineering GmbH > > > + * > > > + * See file CREDITS for list of people who contributed to this > > > + * project. > > > + * > > > + * This program is free software; you can redistribute it and/or > > > + * modify it under the terms of the GNU General Public License as > > > + * published by the Free Software Foundation; either version 2 of > > > + * the License, or (at your option) any later version. > > > + * > > > + * This program is distributed in the hope that it will be > useful, > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > > + * GNU General Public License for more details. > > > + * > > > + * You should have received a copy of the GNU General Public > License > > > + * along with this program; if not, write to the Free Software > > > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > > > + * MA 02110-1301 USA > > > + */ > > > + > > > +#include <common.h> > > > +#include <miiphy.h> > > > +#include <asm/arch/cpu.h> > > > +#include <asm/arch/kirkwood.h> > > > +#include <asm/arch/mpp.h> > > > +#include <asm/io.h> > > > + > > > +DECLARE_GLOBAL_DATA_PTR; > > > + > > > +#define TK71_OE_LOW (~0) > > > +#define TK71_OE_HIGH (~0) > > > +#define TK71_OE_VAL_LOW (0) > > > +#define TK71_OE_VAL_HIGH (0) > > > + > > > +int board_early_init_f(void) > > > +{ > > > + unsigned long size = get_ram_size(PHYS_SDRAM_1, > > > PHYS_SDRAM_1_SIZE); > > > + > > > + /* 256MB module, adjust BAR register */ > > > + if (size == 256 * 1024 * 1024) { > > > + writel(KW_REG_CPUCS_WIN_ENABLE | > KW_REG_CPUCS_WIN_SIZE(0xf), > > > + KW_REG_CPUCS_WIN_SZ(0)); > > > + } > > > > Hi Marek > > This is first patch to support this board series, so ideally you > don't need > > further tuning of DRAM configuration, if you address it in > kwbimage.cfg > > What do you mean adress is in kwbimage.cfg ? > > > You may think of this approach if you have similar board support in > future. > > > > Please post the patch w/o updating DRAM registers or > > How exactly would you support the 256MB variant? > > > Let's do it in cleaner way. > > I already asked -- did you get anywhere with the cleaner approach? > It's not even > discussed properly yet, let alone implemented. Let's discuss and address this first > > > macros are NOT encouraged to use for register definition. > > What do you mean? KW_REGISTER(0x1504) + (x * 0x08) is not recommended, let's use c-struct for this. Regards.. Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 13:00 ` Prafulla Wadaskar @ 2012-07-03 13:03 ` Marek Vasut 0 siblings, 0 replies; 23+ messages in thread From: Marek Vasut @ 2012-07-03 13:03 UTC (permalink / raw) To: u-boot Dear Prafulla Wadaskar, > > -----Original Message----- > > From: Marek Vasut [mailto:marex at denx.de] > > Sent: 03 July 2012 18:21 > > To: Prafulla Wadaskar > > Cc: u-boot at lists.denx.de; Wolfgang Denk > > Subject: Re: [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 > > > > Dear Prafulla Wadaskar, > > > > > > -----Original Message----- > > > > From: Marek Vasut [mailto:marex at denx.de] > > > > Sent: 03 July 2012 17:58 > > > > To: u-boot at lists.denx.de > > > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > > > Subject: [PATCH V3 2/2] Kirkwood: Add support for Ka-Ro TK71 > > > > > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > > > Cc: Prafulla Wadaskar <prafulla@marvell.com> > > > > Cc: Wolfgang Denk <wd@denx.de> > > > > > > ...snip... > > > > > > > diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c > > > > new file mode 100644 > > > > index 0000000..50b563e > > > > --- /dev/null > > > > +++ b/board/karo/tk71/tk71.c > > > > @@ -0,0 +1,174 @@ > > > > +/* > > > > + * Copyright (C) 2012 Marek Vasut <marex@denx.de> > > > > + * on behalf of DENX Software Engineering GmbH > > > > + * > > > > + * See file CREDITS for list of people who contributed to this > > > > + * project. > > > > + * > > > > + * This program is free software; you can redistribute it and/or > > > > + * modify it under the terms of the GNU General Public License as > > > > + * published by the Free Software Foundation; either version 2 of > > > > + * the License, or (at your option) any later version. > > > > + * > > > > + * This program is distributed in the hope that it will be > > > > useful, > > > > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > > > + * GNU General Public License for more details. > > > > + * > > > > + * You should have received a copy of the GNU General Public > > > > License > > > > > > + * along with this program; if not, write to the Free Software > > > > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > > > > + * MA 02110-1301 USA > > > > + */ > > > > + > > > > +#include <common.h> > > > > +#include <miiphy.h> > > > > +#include <asm/arch/cpu.h> > > > > +#include <asm/arch/kirkwood.h> > > > > +#include <asm/arch/mpp.h> > > > > +#include <asm/io.h> > > > > + > > > > +DECLARE_GLOBAL_DATA_PTR; > > > > + > > > > +#define TK71_OE_LOW (~0) > > > > +#define TK71_OE_HIGH (~0) > > > > +#define TK71_OE_VAL_LOW (0) > > > > +#define TK71_OE_VAL_HIGH (0) > > > > + > > > > +int board_early_init_f(void) > > > > +{ > > > > + unsigned long size = get_ram_size(PHYS_SDRAM_1, > > > > PHYS_SDRAM_1_SIZE); > > > > + > > > > + /* 256MB module, adjust BAR register */ > > > > + if (size == 256 * 1024 * 1024) { > > > > + writel(KW_REG_CPUCS_WIN_ENABLE | > > > > KW_REG_CPUCS_WIN_SIZE(0xf), > > > > > > + KW_REG_CPUCS_WIN_SZ(0)); > > > > + } > > > > > > Hi Marek > > > This is first patch to support this board series, so ideally you > > > > don't need > > > > > further tuning of DRAM configuration, if you address it in > > > > kwbimage.cfg > > > > What do you mean adress is in kwbimage.cfg ? > > > > > You may think of this approach if you have similar board support in > > > > future. > > > > > Please post the patch w/o updating DRAM registers or > > > > How exactly would you support the 256MB variant? > > > > > Let's do it in cleaner way. > > > > I already asked -- did you get anywhere with the cleaner approach? > > It's not even > > discussed properly yet, let alone implemented. > > Let's discuss and address this first Correct, ITM I sent version without memory adjustment > > > macros are NOT encouraged to use for register definition. > > > > What do you mean? > > KW_REGISTER(0x1504) + (x * 0x08) is not recommended, let's use c-struct for > this. Correct, I figured right after I hit send ... sorry ;-) > > Regards.. > Prafulla . . . Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V4] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 12:27 ` [U-Boot] [PATCH V3 2/2] " Marek Vasut 2012-07-03 12:44 ` Prafulla Wadaskar @ 2012-07-03 13:02 ` Marek Vasut 2012-07-03 13:12 ` Prafulla Wadaskar 1 sibling, 1 reply; 23+ messages in thread From: Marek Vasut @ 2012-07-03 13:02 UTC (permalink / raw) To: u-boot Signed-off-by: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de> --- board/karo/tk71/Makefile | 45 +++++++++++ board/karo/tk71/kwbimage.cfg | 174 ++++++++++++++++++++++++++++++++++++++++++ board/karo/tk71/tk71.c | 166 ++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ 5 files changed, 516 insertions(+) create mode 100644 board/karo/tk71/Makefile create mode 100644 board/karo/tk71/kwbimage.cfg create mode 100644 board/karo/tk71/tk71.c create mode 100644 include/configs/tk71.h V2: Enable hush parser V3: Fixup kirkwood_mpp_conf() arguments V4: Drop 256MB board variant support diff --git a/board/karo/tk71/Makefile b/board/karo/tk71/Makefile new file mode 100644 index 0000000..934e391 --- /dev/null +++ b/board/karo/tk71/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2012 Marek Vasut <marex@denx.de> +# on behalf of DENX Software Engineering GmbH +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := tk71.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg new file mode 100644 index 0000000..0166826 --- /dev/null +++ b/board/karo/tk71/kwbimage.cfg @@ -0,0 +1,174 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# adopted to TK71 by +# Nils Faerber <nils.faerber@kernelconcepts.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x36543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x1101355b # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000034 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x00000000 # DDR Address Control +# bit1-0: 01, Cs0width=x16 +# bit3-2: 10, Cs0size=512Mb +# bit5-4: 01, Cs1width=x16 +# bit7-6: 10, Cs1size=512Mb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000652 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000042 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x1FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x00000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x00000000 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00110000 # DDR ODT Control (Low) +# bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1 +# bit7-4: 0001, (read) M_ODT[1] is asserted during read from DRAM CS0 +# bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1. +# bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0. +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000F80F # CPU ODT Control +# bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3 +# bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm +# bit13-12: 10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm +# bit14: 1, M_STARTBURST_IN ODT: Enabled +# bit15: 1, DDR IO ODT Unit: Use ODT block +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c new file mode 100644 index 0000000..96410d7 --- /dev/null +++ b/board/karo/tk71/tk71.c @@ -0,0 +1,166 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define TK71_OE_LOW (~0) +#define TK71_OE_HIGH (~0) +#define TK71_OE_VAL_LOW (0) +#define TK71_OE_VAL_HIGH (0) + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(TK71_OE_VAL_LOW, + TK71_OE_VAL_HIGH, + TK71_OE_LOW, TK71_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config, NULL); + + return 0; +} + +int board_init(void) +{ + /* + * arch number of board + */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_NET + +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +static void mv_phy_88e1118_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1118 Initialized on %s\n", name); +} + +/* Configure and enable Switch and PHY */ +void reset_phy(void) +{ + /* configure and initialize PHY */ + mv_phy_88e1118_init("egiga0"); + +} +#endif diff --git a/boards.cfg b/boards.cfg index d33ff27..a423555 100644 --- a/boards.cfg +++ b/boards.cfg @@ -158,6 +158,7 @@ rd6281a arm arm926ejs - Marvell sheevaplug arm arm926ejs - Marvell kirkwood ib62x0 arm arm926ejs ib62x0 raidsonic kirkwood dockstar arm arm926ejs - Seagate kirkwood +tk71 arm arm926ejs tk71 karo kirkwood devkit3250 arm arm926ejs devkit3250 timll lpc32xx jadecpu arm arm926ejs jadecpu syteco mb86r0x mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg diff --git a/include/configs/tk71.h b/include/configs/tk71.h new file mode 100644 index 0000000..f929f20 --- /dev/null +++ b/include/configs/tk71.h @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __CONFIG_TK71_H__ +#define __CONFIG_TK71_H__ + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nKa-Ro TK71" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_NR_DRAM_BANKS 1 + +#define MACH_TYPE_TK71 2399 +#define CONFIG_MACH_TYPE MACH_TYPE_TK71 + +/* + * Commands configuration + */ +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT + +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * NAND flash + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_JFFS2_NAND +#define CONFIG_JFFS2_DEV "nand0,3" +#endif + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} +#define CONFIG_PHY_BASE_ADR 0x08 +#endif + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_KIRKWOOD +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_ADDR 0x80000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "nand read 0x800000 kernel 0x300000; bootm;" +#define CONFIG_MTDPARTS "512K(u-boot),512K(u-boot-env),3M(kernel),-(root)" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_uboot=dhcp u-boot.kwb; nand erase.part u-boot; nand write ${fileaddr} u-boot ${filesize}\0" \ + "update_kernel=dhcp uImage-tk71; nand erase.part kernel; nand write ${fileaddr} kernel ${filesize} \0" \ + "update_rootfs=dhcp rootfs-tk71; nand erase.part root; nand write ${fileaddr} root ${filesize}\0" \ + "update_all=run update_uboot; run update_kernel; run update_rootfs; reset\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts=mtdparts=orion_nand:"CONFIG_MTDPARTS"\0" \ + "bootargs=console=ttyS0,115200 mtdparts=orion_nand:"CONFIG_MTDPARTS" rootfstype=jffs2 root=/dev/mtdblock3 rw\0" +#define MTDIDS_DEFAULT "nand0=orion_nand" +#define MTDPARTS_DEFAULT "mtdparts=orion_nand:"CONFIG_MTDPARTS + +#define PHYS_SDRAM_1 0x00000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ + +#endif /* __CONFIG_TK71_H__ */ -- 1.7.10 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 2/2 V4] Kirkwood: Add support for Ka-Ro TK71 2012-07-03 13:02 ` [U-Boot] [PATCH 2/2 V4] " Marek Vasut @ 2012-07-03 13:12 ` Prafulla Wadaskar 0 siblings, 0 replies; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-03 13:12 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Marek Vasut [mailto:marex at denx.de] > Sent: 03 July 2012 18:32 > To: u-boot at lists.denx.de > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > Subject: [PATCH 2/2 V4] Kirkwood: Add support for Ka-Ro TK71 > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Prafulla Wadaskar <prafulla@marvell.com> > Cc: Wolfgang Denk <wd@denx.de> > --- > board/karo/tk71/Makefile | 45 +++++++++++ > board/karo/tk71/kwbimage.cfg | 174 > ++++++++++++++++++++++++++++++++++++++++++ > board/karo/tk71/tk71.c | 166 > ++++++++++++++++++++++++++++++++++++++++ > boards.cfg | 1 + > include/configs/tk71.h | 130 +++++++++++++++++++++++++++++++ > 5 files changed, 516 insertions(+) > create mode 100644 board/karo/tk71/Makefile > create mode 100644 board/karo/tk71/kwbimage.cfg > create mode 100644 board/karo/tk71/tk71.c > create mode 100644 include/configs/tk71.h > > V2: Enable hush parser > V3: Fixup kirkwood_mpp_conf() arguments > V4: Drop 256MB board variant support > Thanks, Applied to u-boot-marvell.git master branch Regards... Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h 2012-06-26 18:49 [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Marek Vasut 2012-06-26 18:49 ` [U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71 Marek Vasut @ 2012-06-29 10:02 ` Gerlando Falauto 2012-06-29 10:08 ` Marek Vasut 2012-06-29 11:37 ` [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() Gerlando Falauto 2 siblings, 1 reply; 23+ messages in thread From: Gerlando Falauto @ 2012-06-29 10:02 UTC (permalink / raw) To: u-boot Dear Maruk, I am currently trying to address the exact same issue (SDRAM size detection and fixup). My idea was however (as opposed to moving register definition as you did), to add a fixup function to dram.c, say: /* * kw_sdram_bs - writes SDRAM Bank size */ void kw_sdram_bs_set(enum memory_bank bank, u32 size) { /* Read current register value */ u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank)); printf("Current value: %x\n", reg); /* Clear window size */ reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF); /* Set new window size */ reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24); printf("Writing: %x\n", reg); writel(reg, KW_REG_CPUCS_WIN_SZ(bank)); } which would then be called to fix the window size according to the total memory size as reported by get_ram_size(). What do you think? Thank you, Gerlando ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h 2012-06-29 10:02 ` [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Gerlando Falauto @ 2012-06-29 10:08 ` Marek Vasut 2012-06-29 10:27 ` Gerlando Falauto 0 siblings, 1 reply; 23+ messages in thread From: Marek Vasut @ 2012-06-29 10:08 UTC (permalink / raw) To: u-boot Dear Gerlando Falauto, > Dear Maruk, > > I am currently trying to address the exact same issue (SDRAM size > detection and fixup). > My idea was however (as opposed to moving register definition as you > did), to add a fixup function to dram.c, say: > > /* > * kw_sdram_bs - writes SDRAM Bank size > */ > void kw_sdram_bs_set(enum memory_bank bank, u32 size) > { > /* Read current register value */ > u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank)); > > printf("Current value: %x\n", reg); > /* Clear window size */ > reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF); > > /* Set new window size */ > reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24); > > printf("Writing: %x\n", reg); > writel(reg, KW_REG_CPUCS_WIN_SZ(bank)); > } > > which would then be called to fix the window size according to the total > memory size as reported by get_ram_size(). Read up at [1]. http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/133991 > What do you think? > > Thank you, > Gerlando Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h 2012-06-29 10:08 ` Marek Vasut @ 2012-06-29 10:27 ` Gerlando Falauto 2012-06-29 10:51 ` Marek Vasut 0 siblings, 1 reply; 23+ messages in thread From: Gerlando Falauto @ 2012-06-29 10:27 UTC (permalink / raw) To: u-boot Dear Marek Vasut, On 06/29/2012 12:08 PM, Marek Vasut wrote: > Dear Gerlando Falauto, > >> Dear Maruk, sorry about my misspelling! >> >> I am currently trying to address the exact same issue (SDRAM size >> detection and fixup). >> My idea was however (as opposed to moving register definition as you >> did), to add a fixup function to dram.c, say: >> >> /* >> * kw_sdram_bs - writes SDRAM Bank size >> */ >> void kw_sdram_bs_set(enum memory_bank bank, u32 size) >> { >> /* Read current register value */ >> u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank)); >> >> printf("Current value: %x\n", reg); >> /* Clear window size */ >> reg&= ~KW_REG_CPUCS_WIN_SIZE(0xFF); >> >> /* Set new window size */ >> reg |= KW_REG_CPUCS_WIN_SIZE((size - 1)>> 24); >> >> printf("Writing: %x\n", reg); >> writel(reg, KW_REG_CPUCS_WIN_SZ(bank)); >> } >> >> which would then be called to fix the window size according to the total >> memory size as reported by get_ram_size(). > > Read up at [1]. > > http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/133991 Did read up, not sure I understand. If I get it right, *this* thread and patchset follows the feedback from the above thread. What I am trying to say is: we have a function (available to all kirkwood boards) which reads the value of the window size register for a given memory bank and returns its size. Now we want to do the opposite, write the window size register according to the detected SDRAM size. Why should we make up our own (board-specific) register manipulation tweaks, as opposed to having a function do it for us in dram.c as its companion? Reasons behind it, are board-specific, so in your case it would turn into: +int board_early_init_f(void) +{ + unsigned long size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + + /* 256MB module, adjust BAR register */ + if (size == 256 * 1024 * 1024) + kw_sdram_bs_set(0, size); Which I find cleaner. Even the if part could be also removed. And would work as-is on any board needing it (ours, for instance). What do you think? Thank you for your patience, Gerlando ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h 2012-06-29 10:27 ` Gerlando Falauto @ 2012-06-29 10:51 ` Marek Vasut 0 siblings, 0 replies; 23+ messages in thread From: Marek Vasut @ 2012-06-29 10:51 UTC (permalink / raw) To: u-boot Dear Gerlando Falauto, > Dear Marek Vasut, > > On 06/29/2012 12:08 PM, Marek Vasut wrote: > > Dear Gerlando Falauto, > > > >> Dear Maruk, > > sorry about my misspelling! > > >> I am currently trying to address the exact same issue (SDRAM size > >> detection and fixup). > >> My idea was however (as opposed to moving register definition as you > >> did), to add a fixup function to dram.c, say: > >> > >> /* > >> > >> * kw_sdram_bs - writes SDRAM Bank size > >> */ > >> > >> void kw_sdram_bs_set(enum memory_bank bank, u32 size) > >> { > >> > >> /* Read current register value */ > >> u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank)); > >> > >> printf("Current value: %x\n", reg); > >> /* Clear window size */ > >> reg&= ~KW_REG_CPUCS_WIN_SIZE(0xFF); > >> > >> /* Set new window size */ > >> reg |= KW_REG_CPUCS_WIN_SIZE((size - 1)>> 24); > >> > >> printf("Writing: %x\n", reg); > >> writel(reg, KW_REG_CPUCS_WIN_SZ(bank)); > >> > >> } > >> > >> which would then be called to fix the window size according to the total > >> memory size as reported by get_ram_size(). > > > > Read up at [1]. > > > > http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/133991 > > Did read up, not sure I understand. > If I get it right, *this* thread and patchset follows the feedback from > the above thread. > > What I am trying to say is: we have a function (available to all > kirkwood boards) which reads the value of the window size register for a > given memory bank and returns its size. > Now we want to do the opposite, write the window size register according > to the detected SDRAM size. > Why should we make up our own (board-specific) register manipulation > tweaks, as opposed to having a function do it for us in dram.c as its > companion? > Reasons behind it, are board-specific, so in your case it would turn into: > > +int board_early_init_f(void) > +{ > + unsigned long size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); > + > + /* 256MB module, adjust BAR register */ > + if (size == 256 * 1024 * 1024) > + kw_sdram_bs_set(0, size); > > Which I find cleaner. > Even the if part could be also removed. > And would work as-is on any board needing it (ours, for instance). > > What do you think? I'm all right with it. But Prafulla is the maintainer, so you better negotiate with him :-) > Thank you for your patience, > Gerlando Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() 2012-06-26 18:49 [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Marek Vasut 2012-06-26 18:49 ` [U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71 Marek Vasut 2012-06-29 10:02 ` [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Gerlando Falauto @ 2012-06-29 11:37 ` Gerlando Falauto 2012-07-05 10:39 ` Albert ARIBAUD 2 siblings, 1 reply; 23+ messages in thread From: Gerlando Falauto @ 2012-06-29 11:37 UTC (permalink / raw) To: u-boot Some boards might be equipped with different SDRAM configurations. When that is the case, CPU CS Window Size Register (CS[0]n Size) should be set to the biggest value through board.cfg file; then its value can be fixed at runtime according to the detected SDRAM size. Therefore, implement kw_sdram_bs_set(), to be called for instance within board_early_init_f(). Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Holger Brunck <holger.brunck@keymile.com> --- arch/arm/cpu/arm926ejs/kirkwood/dram.c | 28 ++++++++++++++++++++++++++-- arch/arm/include/asm/arch-kirkwood/cpu.h | 2 ++ 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 2441554..e5409f1 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -28,8 +28,15 @@ DECLARE_GLOBAL_DATA_PTR; -#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + (x * 0x08)) -#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08)) +/* Kirkwood memory registers */ +#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + ((x) * 0x08)) +#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + ((x) * 0x08)) + +#define KW_REG_CPUCS_WIN_ENABLE (1 << 0) +#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1) +#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2) +#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24) + /* * kw_sdram_bar - reads SDRAM Base Address Register */ @@ -60,6 +67,23 @@ u32 kw_sdram_bs(enum memory_bank bank) return result; } +/* + * kw_sdram_bs_set - writes SDRAM Bank size + */ +void kw_sdram_bs_set(enum memory_bank bank, u32 size) +{ + /* Read current register value */ + u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank)); + + /* Clear window size */ + reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF); + + /* Set new window size */ + reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24); + + writel(reg, KW_REG_CPUCS_WIN_SZ(bank)); +} + #ifndef CONFIG_SYS_BOARD_DRAM_INIT int dram_init(void) { diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h b/arch/arm/include/asm/arch-kirkwood/cpu.h index d28c51a..807154e 100644 --- a/arch/arm/include/asm/arch-kirkwood/cpu.h +++ b/arch/arm/include/asm/arch-kirkwood/cpu.h @@ -159,6 +159,8 @@ void reset_cpu(unsigned long ignored); unsigned char get_random_hex(void); unsigned int kw_sdram_bar(enum memory_bank bank); unsigned int kw_sdram_bs(enum memory_bank bank); +void kw_sdram_bs_set(enum memory_bank bank, u32 size); + int kw_config_adr_windows(void); void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val, unsigned int gpp0_oe, unsigned int gpp1_oe); -- 1.7.1 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() 2012-06-29 11:37 ` [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() Gerlando Falauto @ 2012-07-05 10:39 ` Albert ARIBAUD 2012-07-05 10:57 ` Gerlando Falauto 0 siblings, 1 reply; 23+ messages in thread From: Albert ARIBAUD @ 2012-07-05 10:39 UTC (permalink / raw) To: u-boot Hi Gerlando, On Fri, 29 Jun 2012 13:37:54 +0200, Gerlando Falauto <gerlando.falauto@keymile.com> wrote: > Some boards might be equipped with different SDRAM configurations. > When that is the case, CPU CS Window Size Register (CS[0]n Size) > should be set to the biggest value through board.cfg file; then its > value can be fixed at runtime according to the detected SDRAM size. > > Therefore, implement kw_sdram_bs_set(), to be called for instance > within board_early_init_f(). > > Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> > Cc: Marek Vasut <marex@denx.de> > Cc: Prafulla Wadaskar <prafulla@marvell.com> > Cc: Wolfgang Denk <wd@denx.de> > Cc: Valentin Longchamp <valentin.longchamp@keymile.com> > Cc: Holger Brunck <holger.brunck@keymile.com> > --- > arch/arm/cpu/arm926ejs/kirkwood/dram.c | 28 > ++++++++++++++++++++++++++-- arch/arm/include/asm/arch-kirkwood/cpu.h > | 2 ++ 2 files changed, 28 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c > b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 2441554..e5409f1 100644 > --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c > +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c > @@ -28,8 +28,15 @@ > > DECLARE_GLOBAL_DATA_PTR; > > -#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) > + (x * 0x08)) -#define KW_REG_CPUCS_WIN_SZ(x) > (KW_REGISTER(0x1504) + (x * 0x08)) +/* Kirkwood memory registers */ > +#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) > + ((x) * 0x08)) +#define KW_REG_CPUCS_WIN_SZ(x) > (KW_REGISTER(0x1504) + ((x) * 0x08)) + > +#define KW_REG_CPUCS_WIN_ENABLE (1 << 0) > +#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1) > +#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2) > +#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24) > + > /* > * kw_sdram_bar - reads SDRAM Base Address Register > */ > @@ -60,6 +67,23 @@ u32 kw_sdram_bs(enum memory_bank bank) > return result; > } > > +/* > + * kw_sdram_bs_set - writes SDRAM Bank size > + */ > +void kw_sdram_bs_set(enum memory_bank bank, u32 size) > +{ > + /* Read current register value */ > + u32 reg = readl(KW_REG_CPUCS_WIN_SZ(bank)); > + > + /* Clear window size */ > + reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF); > + > + /* Set new window size */ > + reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24); > + > + writel(reg, KW_REG_CPUCS_WIN_SZ(bank)); > +} > + > #ifndef CONFIG_SYS_BOARD_DRAM_INIT > int dram_init(void) > { > diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h > b/arch/arm/include/asm/arch-kirkwood/cpu.h index d28c51a..807154e > 100644 --- a/arch/arm/include/asm/arch-kirkwood/cpu.h > +++ b/arch/arm/include/asm/arch-kirkwood/cpu.h > @@ -159,6 +159,8 @@ void reset_cpu(unsigned long ignored); > unsigned char get_random_hex(void); > unsigned int kw_sdram_bar(enum memory_bank bank); > unsigned int kw_sdram_bs(enum memory_bank bank); > +void kw_sdram_bs_set(enum memory_bank bank, u32 size); > + > int kw_config_adr_windows(void); > void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int > gpp1_oe_val, unsigned int gpp0_oe, unsigned int gpp1_oe); I don't like isolated patches that seem to create dead code. I know here it is not the goal, of course; so why not submit a two-patch series, providing both the new code *and* a use for it? Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() 2012-07-05 10:39 ` Albert ARIBAUD @ 2012-07-05 10:57 ` Gerlando Falauto 2012-07-05 11:02 ` Albert ARIBAUD 0 siblings, 1 reply; 23+ messages in thread From: Gerlando Falauto @ 2012-07-05 10:57 UTC (permalink / raw) To: u-boot Hi Albert, On 07/05/2012 12:39 PM, Albert ARIBAUD wrote: > Hi Gerlando, > > On Fri, 29 Jun 2012 13:37:54 +0200, Gerlando Falauto > <gerlando.falauto@keymile.com> wrote: >> Some boards might be equipped with different SDRAM configurations. >> When that is the case, CPU CS Window Size Register (CS[0]n Size) >> should be set to the biggest value through board.cfg file; then its >> value can be fixed at runtime according to the detected SDRAM size. >> >> Therefore, implement kw_sdram_bs_set(), to be called for instance >> within board_early_init_f(). >> [...] > > I don't like isolated patches that seem to create dead code. I know > here it is not the goal, of course; so why not submit a two-patch > series, providing both the new code *and* a use for it? > You're absolutely right. But mine was more of an interruption/suggestion throughout the discussion between Marek and Prafulla... I just didn't want to take credit for someone else's code, or create any conflicts with it. I figured it might be quicker (and more fair) that way, perhaps with Marek resubmitting it within his own series, or SoB-ing it, because in fact mine is just a refactoring of his idea... I can of course submit the two-patch series for our boards, if that's OK with Marek. Thanks, Gerlando ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() 2012-07-05 10:57 ` Gerlando Falauto @ 2012-07-05 11:02 ` Albert ARIBAUD 2012-07-05 12:16 ` Prafulla Wadaskar 0 siblings, 1 reply; 23+ messages in thread From: Albert ARIBAUD @ 2012-07-05 11:02 UTC (permalink / raw) To: u-boot Hi Gerlando, On Thu, 05 Jul 2012 12:57:44 +0200, Gerlando Falauto <gerlando.falauto@keymile.com> wrote: > Hi Albert, > > On 07/05/2012 12:39 PM, Albert ARIBAUD wrote: > > Hi Gerlando, > > > > On Fri, 29 Jun 2012 13:37:54 +0200, Gerlando Falauto > > <gerlando.falauto@keymile.com> wrote: > >> Some boards might be equipped with different SDRAM configurations. > >> When that is the case, CPU CS Window Size Register (CS[0]n Size) > >> should be set to the biggest value through board.cfg file; then its > >> value can be fixed at runtime according to the detected SDRAM size. > >> > >> Therefore, implement kw_sdram_bs_set(), to be called for instance > >> within board_early_init_f(). > >> > [...] > > > > I don't like isolated patches that seem to create dead code. I know > > here it is not the goal, of course; so why not submit a two-patch > > series, providing both the new code *and* a use for it? > > You're absolutely right. > But mine was more of an interruption/suggestion throughout the > discussion between Marek and Prafulla... I just didn't want to take > credit for someone else's code, or create any conflicts with it. Understood. Next time, please just add [RFC] in the subject, so that the patch is not considered for inclusion. > I figured it might be quicker (and more fair) that way, perhaps with > Marek resubmitting it within his own series, or SoB-ing it, because > in fact mine is just a refactoring of his idea... > I can of course submit the two-patch series for our boards, if that's > OK with Marek. That's to be sorted between Marek and you. :) > Thanks, > Gerlando Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() 2012-07-05 11:02 ` Albert ARIBAUD @ 2012-07-05 12:16 ` Prafulla Wadaskar 0 siblings, 0 replies; 23+ messages in thread From: Prafulla Wadaskar @ 2012-07-05 12:16 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net] > Sent: 05 July 2012 16:32 > To: Gerlando Falauto > Cc: u-boot at lists.denx.de; Marek Vasut; Longchamp, Valentin; Brunck, > Holger; Prafulla Wadaskar > Subject: Re: [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() > > Hi Gerlando, > > On Thu, 05 Jul 2012 12:57:44 +0200, Gerlando Falauto > <gerlando.falauto@keymile.com> wrote: > > Hi Albert, > > > > On 07/05/2012 12:39 PM, Albert ARIBAUD wrote: > > > Hi Gerlando, > > > > > > On Fri, 29 Jun 2012 13:37:54 +0200, Gerlando Falauto > > > <gerlando.falauto@keymile.com> wrote: > > >> Some boards might be equipped with different SDRAM > configurations. > > >> When that is the case, CPU CS Window Size Register (CS[0]n Size) > > >> should be set to the biggest value through board.cfg file; then > its > > >> value can be fixed at runtime according to the detected SDRAM > size. > > >> > > >> Therefore, implement kw_sdram_bs_set(), to be called for instance > > >> within board_early_init_f(). > > >> > > [...] > > > > > > I don't like isolated patches that seem to create dead code. I > know > > > here it is not the goal, of course; so why not submit a two-patch > > > series, providing both the new code *and* a use for it? > > > > You're absolutely right. > > But mine was more of an interruption/suggestion throughout the > > discussion between Marek and Prafulla... I just didn't want to take > > credit for someone else's code, or create any conflicts with it. > > Understood. Next time, please just add [RFC] in the subject, so that > the patch is not considered for inclusion. > > > I figured it might be quicker (and more fair) that way, perhaps with > > Marek resubmitting it within his own series, or SoB-ing it, because > > in fact mine is just a refactoring of his idea... > > I can of course submit the two-patch series for our boards, if > that's > > OK with Marek. > > That's to be sorted between Marek and you. :) Hi Gerlando Marek's board support for TK71 is pulled in, may be this patch will be useful for his next board support (if any). BTW: you can always submit it as a part of patch series for your boards. Regards... Prafulla . . . ^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2012-07-05 12:16 UTC | newest] Thread overview: 23+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-06-26 18:49 [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Marek Vasut 2012-06-26 18:49 ` [U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71 Marek Vasut 2012-06-27 12:02 ` [U-Boot] [PATCH 2/2 V2] " Marek Vasut 2012-07-03 11:43 ` Prafulla Wadaskar 2012-07-03 11:56 ` Prafulla Wadaskar 2012-07-03 12:08 ` Prafulla Wadaskar 2012-07-03 12:23 ` Marek Vasut 2012-07-03 12:27 ` [U-Boot] [PATCH V3 2/2] " Marek Vasut 2012-07-03 12:44 ` Prafulla Wadaskar 2012-07-03 12:51 ` Marek Vasut 2012-07-03 13:00 ` Prafulla Wadaskar 2012-07-03 13:03 ` Marek Vasut 2012-07-03 13:02 ` [U-Boot] [PATCH 2/2 V4] " Marek Vasut 2012-07-03 13:12 ` Prafulla Wadaskar 2012-06-29 10:02 ` [U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h Gerlando Falauto 2012-06-29 10:08 ` Marek Vasut 2012-06-29 10:27 ` Gerlando Falauto 2012-06-29 10:51 ` Marek Vasut 2012-06-29 11:37 ` [U-Boot] [PATCH] kirkwood: implement kw_sdram_bs_set() Gerlando Falauto 2012-07-05 10:39 ` Albert ARIBAUD 2012-07-05 10:57 ` Gerlando Falauto 2012-07-05 11:02 ` Albert ARIBAUD 2012-07-05 12:16 ` Prafulla Wadaskar
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