From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 5 Jul 2012 20:47:06 +0200 Subject: [U-Boot] [PATCH] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment In-Reply-To: References: <1341407039-6018-1-git-send-email-ilya.yanok@cogentembedded.com> <20120705171523.GA13077@bill-the-cat> Message-ID: <201207052047.06541.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Ilya Yanok, > Hi Tom, > > On Thu, Jul 5, 2012 at 9:15 PM, Tom Rini wrote: > > On Wed, Jul 04, 2012 at 05:03:59PM +0400, Ilya Yanok wrote: > > ` > > > > > From: Tom Rini > > > > > > The USB spec says that 32 bytes is the minimum required alignment. > > > However on some platforms we have a larger minimum requirement for > > > cache coherency. In those cases, use that value rather than the USB > > > spec minimum. We add a cpp check to to define > > > USB_DMA_MINALIGN and make use of it in ehci-hcd.c and musb_core.h. We > > > cannot use MAX() here as we are not allowed to have tests inside of > > > align(...). > > > > > > Cc: Marek Vasut > > > Signed-off-by: Tom Rini > > > [ilya.yanok]: fix size alignment, drop (incorrect) rounding > > > when invalidating the buffer. If we got unaligned buffer from the > > > upper layer -- that's definetely a bug so it's good to buzz > > > about it. But we have to align the buffer length -- upper layers > > > should take care to reserve enough space. > > > Signed-off-by: Ilya Yanok > > > > So trying this on ethernet still gives a handful of unaligned areas. Do > > Not surprised. USB Ethernet drivers are unfixed wrt cache alignment. Well I fixed the ASIX, but now that I think about it, the fix might not be enough. > you have a beagleboard xM available? > Unfortunately no. Any ARMv7 chip shall be OK. > > Regards, Ilya. Best regards, Marek Vasut