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From: Allen Martin <amartin@nvidia.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/7] HACK: rearrange link order for thumb
Date: Fri, 6 Jul 2012 14:32:07 -0700	[thread overview]
Message-ID: <20120706213207.GC29103@nvidia.com> (raw)
In-Reply-To: <4FF74E30.3000101@wwwdotorg.org>

On Fri, Jul 06, 2012 at 01:44:32PM -0700, Stephen Warren wrote:
> On 07/06/2012 02:33 PM, Allen Martin wrote:
> > On Fri, Jul 06, 2012 at 12:09:43PM -0700, Stephen Warren wrote:
> >> On 07/06/2012 12:08 PM, Allen Martin wrote:
> >>> Rearrange the link order of libraries to avoid out of bound
> >>> relocations in thumb mode.  I have no idea how to fix this for real.
> >>
> >> Are the relocations branches or something else? It looks like
> >> unconditional jump range is +/-4MB for Thumb1 and +/-16MB for Thumb2, so
> >> I'm surprised we'd be exceeding that, considering the U-boot binary is
> >> on the order of 256KB on Tegra right now.
> > 
> > 
> > This is the relcation type:
> > 
> > arch/arm/lib/libarm.o: In function `__flush_dcache_all':
> > /home/arm/u-boot/arch/arm/lib/cache.c:52: relocation truncated to fit: R_ARM_THM_JUMP11 against symbol `flush_cache' defined in .text section in arch/arm/cpu/armv7/libarmv7.o
> > 
> > The instruction is a "b.n" not a "b", which is what is causing the problem.
> > 
> > I think because of the weak alias the compiler used a short jump to
> > the local function, but when it got linked it resolved to a function
> > that was too far away for the short jump:
> > 
> > 
> > void  flush_cache(unsigned long start, unsigned long size)
> >         __attribute__((weak, alias("__flush_cache")));
> > 
> > 00000002 <__flush_dcache_all>:
> >    2:   2000            movs    r0, #0
> >    4:   f04f 31ff       mov.w   r1, #4294967295 ; 0xffffffff
> >    8:   e7fe            b.n     0 <__flush_cache>
> 
> Ah, that explanation makes sense.
> 
> > It looks like there's a "-fno-optimize-sibling-calls" option to gcc to
> > avoid this problem.  Seems a shame to disable all short jumps for this
> > one case though.
> 
> It seems like a bug that the b-vs-b.n optimization is applied to a weak
> symbol, since the compiler can't possibly know the range of the jump.
> 
> Also, I've seen ld for some architectures rewrite the equivalent of b.n
> to plain b when needing to expand the branch target range; IIRC a
> process known as "relaxing"? Perhaps gcc is expecting ld to do that, but
> ld isn't?

I found this issue online, which if not the exact same problem, is
very similar:

http://lists.linaro.org/pipermail/linaro-dev/2011-February/002886.html 

-Allen
-- 
nvpublic

  reply	other threads:[~2012-07-06 21:32 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-06 18:08 [U-Boot] [PATCH 0/7] tegra20: enable thumb Allen Martin
2012-07-06 18:08 ` [U-Boot] [PATCH 1/7] tegra20: remove inline assembly for u32 cast Allen Martin
2012-07-06 18:08 ` [U-Boot] [PATCH 2/7] HACK: rearrange link order for thumb Allen Martin
2012-07-06 19:09   ` Stephen Warren
2012-07-06 20:33     ` Allen Martin
2012-07-06 20:44       ` Stephen Warren
2012-07-06 21:32         ` Allen Martin [this message]
2012-07-06 23:04         ` Allen Martin
2012-07-06 23:17         ` Allen Martin
2012-07-07 10:15           ` Albert ARIBAUD
2012-07-07 18:42             ` Allen Martin
2012-07-10  0:45             ` Allen Martin
2012-07-10  0:57               ` Graeme Russ
2012-07-12 18:45                 ` Albert ARIBAUD
2012-07-17 19:26                   ` Allen Martin
2012-07-06 18:08 ` [U-Boot] [PATCH 3/7] tegra20: enable thumb build Allen Martin
2012-07-06 19:10   ` Stephen Warren
2012-07-06 20:34     ` Allen Martin
2012-07-06 18:08 ` [U-Boot] [PATCH 4/7] arm: add _thumb1_case_uqi to libgcc Allen Martin
2012-07-06 18:09 ` [U-Boot] [PATCH 5/7] arm: add thumb compatible return instructions Allen Martin
2012-07-06 18:09 ` [U-Boot] [PATCH 6/7] arm: use thumb compatible return in arm720t Allen Martin
2012-07-06 18:09 ` [U-Boot] [PATCH 7/7] arm: change arm720t to armv4t Allen Martin

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