From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] smsc95xx: align buffers to cache line size
Date: Sun, 8 Jul 2012 23:31:28 +0200 [thread overview]
Message-ID: <201207082331.29059.marek.vasut@gmail.com> (raw)
In-Reply-To: <CAA3CPjVuizzK-_bh+pxET4WmoyKJyaLsNWfSdftfLxfRYULPZw@mail.gmail.com>
Dear Ilya Yanok,
> Dear Marek,
>
> On Sun, Jul 8, 2012 at 10:59 PM, Marek Vasut <marek.vasut@gmail.com> wrote:
> > btw. this will fail with cache line < 32 .
>
> Hm.. I have to admit I'm not very much into USB specs and I don't have any
> non-ARMv7 system now to do some testing...
> But it used to work without any alignment, right? (with disabled dcache, of
> course)
> That makes me think that data buffers don't need any alignment (from USB
> pov, not cache) and 32-byte alignment is required for internal structs
> only.
See ehci-r10.pdf ... chapter 3.5 ... the buffer pointer has to be aligned too it
seems.
> Regards, Ilya.
Best regards,
Marek Vasut
next prev parent reply other threads:[~2012-07-08 21:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-08 13:53 [U-Boot] [PATCH] smsc95xx: align buffers to cache line size Ilya Yanok
2012-07-08 18:59 ` Marek Vasut
2012-07-08 19:35 ` Ilya Yanok
2012-07-08 21:31 ` Marek Vasut [this message]
2012-07-08 22:32 ` Ilya Yanok
2012-07-09 0:45 ` Marek Vasut
2012-07-09 18:33 ` Ilya Yanok
2012-07-10 2:17 ` Marek Vasut
2012-07-10 8:48 ` Ilya Yanok
2012-07-10 9:34 ` Marek Vasut
2012-07-10 11:25 ` Ilya Yanok
2012-07-10 15:53 ` Marek Vasut
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