From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/3] DaVinci DA8xx: replace magic number for DDR speed
Date: Mon, 30 Jul 2012 10:25:34 -0700 [thread overview]
Message-ID: <20120730172534.GC9554@bill-the-cat> (raw)
In-Reply-To: <20120730163439.GC26574@guralp.com>
On Mon, Jul 30, 2012 at 04:34:39PM +0000, Laurence Withers wrote:
> On Mon, Jul 30, 2012 at 04:30:15PM +0000, Laurence Withers wrote:
> > Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
> > definition. In addition, don't request this clock ID on DA830 hardware,
> > which does not have a DDR2/mDDR PHY (or associated PLL controller).
> >
> > Signed-off-by: Laurence Withers <lwithers@guralp.com>
> > Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
> > ---
> > arch/arm/cpu/arm926ejs/davinci/cpu.c | 3 ++-
> > arch/arm/include/asm/arch-davinci/hardware.h | 2 ++
> > 2 files changed, 4 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c b/arch/arm/cpu/arm926ejs/davinci/cpu.c
> > index 4bdb08b..b31add8 100644
> > --- a/arch/arm/cpu/arm926ejs/davinci/cpu.c
> > +++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
> > @@ -122,7 +122,8 @@ int set_cpu_clk_info(void)
> > {
> > gd->bd->bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 1000000;
> > /* DDR PHY uses an x2 input clock */
> > - gd->bd->bi_ddr_freq = clk_get(0x10001) / 1000000;
> > + gd->bd->bi_ddr_freq = cpu_is_da830() ? 0 :
> > + (clk_get(DAVINCI_DDR_CLKID) / 1000000);
> > gd->bd->bi_dsp_freq = 0;
> > return 0;
> > }
> > diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
> > index 0fce940..7f3dcc2 100644
> > --- a/arch/arm/include/asm/arch-davinci/hardware.h
> > +++ b/arch/arm/include/asm/arch-davinci/hardware.h
> > @@ -459,10 +459,12 @@ enum davinci_clk_ids {
> > DAVINCI_PLL0_SYSCLK2 = DAVINCI_PLLC0_FLAG | 2,
> > DAVINCI_PLL0_SYSCLK4 = DAVINCI_PLLC0_FLAG | 4,
> > DAVINCI_PLL0_SYSCLK6 = DAVINCI_PLLC0_FLAG | 6,
> > + DAVINCI_PLL1_SYSCLK1 = DAVINCI_PLLC1_FLAG | 1,
> > DAVINCI_PLL1_SYSCLK2 = DAVINCI_PLLC1_FLAG | 2,
> >
> > /* map peripherals to clock IDs */
> > DAVINCI_ARM_CLKID = DAVINCI_PLL0_SYSCLK6,
> > + DAVINCI_DDR_CLKID = DAVINCI_PLL1_SYSCLK1,
> > DAVINCI_MDIO_CLKID = DAVINCI_PLL0_SYSCLK4,
> > DAVINCI_MMC_CLKID = DAVINCI_PLL0_SYSCLK2,
> > DAVINCI_SPI0_CLKID = DAVINCI_PLL0_SYSCLK2,
> > --
> > 1.7.2.5
> >
>
> Hi,
>
> This patch does depend on my earlier patch to tidy up the definition of
> set_cpu_clk_info() :
>
> http://lists.denx.de/pipermail/u-boot/2012-July/129205.html
Can you please post everything as a series of 4 patches so that we don't
add and then replace the magic value with the enum? Other than that,
I'm happy with the series and will apply the updated series on Friday or
so, thanks!
--
Tom
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prev parent reply other threads:[~2012-07-30 17:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-30 16:30 [U-Boot] [PATCH 1/3] DaVinci DA8xx: tidy up clock ID definition Laurence Withers
2012-07-30 16:30 ` [U-Boot] [PATCH 2/3] DaVinci DA850: UART2 clock ID comes from ASYNC3 Laurence Withers
2012-07-30 16:30 ` [U-Boot] [PATCH 3/3] DaVinci DA8xx: replace magic number for DDR speed Laurence Withers
2012-07-30 16:34 ` Laurence Withers
2012-07-30 17:25 ` Tom Rini [this message]
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