From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Fri, 3 Aug 2012 09:06:21 -0700 Subject: [U-Boot] [PATCH v2 2/4] DaVinci DA850: UART2 clock ID comes from ASYNC3 In-Reply-To: <1343727037-17419-3-git-send-email-lwithers@guralp.com> References: <1343727037-17419-1-git-send-email-lwithers@guralp.com> <1343727037-17419-3-git-send-email-lwithers@guralp.com> Message-ID: <20120803160621.GE16633@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, Jul 31, 2012 at 09:30:35AM +0000, Laurence Withers wrote: > On the DA830, UART2's clock is derived from PLL controller 0 output 2. > On the DA850, it is in the ASYNC3 group, and may be switched between PLL > controller 0 or 1. Fix the definition of the ID to match. > > Signed-off-by: Laurence Withers > Cc: Tom Rini > Cc: Prabhakar Lad I've applied this after making it apply cleanly again (DAVINCI_MMC0_CLKID again), thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: