[U-Boot] [PATCH 03/16] Blackfin: Bf60x: support big cplb page

[Mike Frysinger <vapier@gentoo.org>]

On Tuesday 07 August 2012 04:07:42 Bob Liu wrote:
> Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for
> them. So that bf609-ezkit can use it's 128M memory.

"it's" -> "its"

>  arch/blackfin/include/asm/cplb.h                 |   13 +++++++++-
>  arch/blackfin/include/asm/mach-common/bits/mpu.h |    6 ++++-
>  arch/blackfin/lib/board.c                        |   28
> ++++++++++++++++------ include/configs/bf609-ezkit.h                    | 
>   6 +----
>  4 files changed, 39 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/blackfin/include/asm/cplb.h
> b/arch/blackfin/include/asm/cplb.h index cc21e93..5a0588b 100644
> --- a/arch/blackfin/include/asm/cplb.h
> +++ b/arch/blackfin/include/asm/cplb.h
> @@ -46,8 +46,11 @@
>  #define CPLB_IDOCACHE		CPLB_INOCACHE | CPLB_L1_CHBL
> 
>  /* Data Attibutes*/
> -
> +#if defined(__ADSPBF60x__)
> +#define SDRAM_IGENERIC          (PAGE_SIZE_16MB | CPLB_L1_CHBL |
> CPLB_USER_RD | CPLB_VALID)
> +#else
>  #define SDRAM_IGENERIC          (PAGE_SIZE_4MB | CPLB_L1_CHBL |
>  CPLB_USER_RD | CPLB_VALID)
> +#endif

many of these ifdefs are largely the same thing.  add a define at the top like:
#ifdef __ADSPBF60x__
# define PAGE_SIZE_MAX PAGE_SIZE_16MB
#else
# define PAGE_SIZE_MAX PAGE_SIZE_14MB
#endif

and then use that in all the other places.  this way you don't need to 
duplicate the vast majority of the content.

> --- a/arch/blackfin/include/asm/mach-common/bits/mpu.h
> +++ b/arch/blackfin/include/asm/mach-common/bits/mpu.h

this should get merged into the main cpu update patch i think

> --- a/arch/blackfin/lib/board.c
> +++ b/arch/blackfin/lib/board.c
> 
>  void init_cplbtables(void)
>  {
> ...
> +#if defined(__ADSPBF60x__)
> +	icplb_add(0x0, 0x0);

err, why ?

> +	dcplb_add(CONFIG_SYS_FLASH_BASE, PAGE_SIZE_16MB | CPLB_DIRTY |
> +			CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID);

can't you use SDRAM_EBIU/SDRAM_INON_CHBL like BF5xx ?  that's what the code 
below is for:
> +#ifndef __ADSPBF60x__
>  	icplb_add(0x20000000, SDRAM_INON_CHBL);
>  	dcplb_add(0x20000000, SDRAM_EBIU);
>  	++i;
> +#endif

this is the async memory blocks ...

> +	cplb_page_size = (4 * 1024 * 1024);
> +	cplb_page_mask = (~(cplb_page_size - 1));

why only use CPLBs of 4 megs for external memory on BF60x ?  you would want to 
maximize the usage of 16MiB to reduce CPLB overhead.

> --- a/include/configs/bf609-ezkit.h
> +++ b/include/configs/bf609-ezkit.h
> @@ -62,11 +62,10 @@
>  #define CONFIG_BFIN_GET_SCLK0 (get_sclk()/CONFIG_SCLK0_DIV)
>  #define CONFIG_BFIN_GET_SCLK1 (get_sclk()/CONFIG_SCLK1_DIV)
> 
> -
>  /*
>   * Memory Settings
>   */
> -#define CONFIG_MEM_SIZE		32
> +#define CONFIG_MEM_SIZE		128
> 
>  #define CONFIG_SMC_GCTL_VAL	0x00000010
>  #define CONFIG_SMC_B1CTL_VAL	0x01002001
> @@ -76,9 +75,6 @@
>  #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
>  #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
> 
> -#define CONFIG_ICACHE_OFF
> -#define CONFIG_DCACHE_OFF
> -
>  /*
>   * Network Settings
>   */

once the CPLB code is updated, you can squash this into the new bf609-ezkit 
patch
-mike
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