From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sat, 18 Aug 2012 01:24:22 +0200 Subject: [U-Boot] [PATCH 2/3] pxa25x: Add UDC registers definitions In-Reply-To: <502EBB46.6090307@gmail.com> References: <1345235499-32556-1-git-send-email-luk0104@gmail.com> <201208172250.40321.marex@denx.de> <502EBB46.6090307@gmail.com> Message-ID: <201208180124.22222.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear ?ukasz Da?ek, [...] > > You don't need this. > > Why? GCC on ARM doesn't align structures? Align to what ? 4 bytes in uboot, so no need for __packed. > >> +#define UDCCFR_AREN (1<< 7) /* ACK response enable (now) */ > >> +#define UDCCFR_ACM (1<< 2) /* ACK control mode (wait for AREN) */ > >> +/* latest pxa255 errata define new "must be one" bits in UDCCFR */ > >> +#define UDCCFR_MB1 (0xff& ~(UDCCFR_AREN | UDCCFR_ACM)) > > > > What errata and where? Please document it in the comment. Also, is the > > register only 8 bit wide? > > Ok, I will document. All registers are 32 bits wide. But some you have to > access like they are 8 bits wide. Ouch :-( > ?ukasz Da?ek Best regards, Marek Vasut