From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mike Frysinger Date: Wed, 22 Aug 2012 23:49:51 -0400 Subject: [U-Boot] [PATCH 03/16] Blackfin: Bf60x: support big cplb page In-Reply-To: References: <1344326875-348-1-git-send-email-lliubbo@gmail.com> <201208080048.34460.vapier@gentoo.org> Message-ID: <201208222349.52948.vapier@gentoo.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Monday 20 August 2012 04:00:21 Bob Liu wrote: > On Wed, Aug 8, 2012 at 12:48 PM, Mike Frysinger wrote: > > On Tuesday 07 August 2012 04:07:42 Bob Liu wrote: > >> --- a/arch/blackfin/lib/board.c > >> +++ b/arch/blackfin/lib/board.c > >> > >> void init_cplbtables(void) > >> { > >> ... > >> +#if defined(__ADSPBF60x__) > >> + icplb_add(0x0, 0x0); > > > > err, why ? > > Because other place use value "i" for both icplb and dcplb this make > them consistent. why not add an ICPLB entry for the same region you just added a DCPLB entry for ? we can directly execute out of the flash memory region ... > >> + cplb_page_size = (4 * 1024 * 1024); > >> + cplb_page_mask = (~(cplb_page_size - 1)); > > > > why only use CPLBs of 4 megs for external memory on BF60x ? you would > > want to maximize the usage of 16MiB to reduce CPLB overhead. > > Bf60x will reinit cplb_page_size/mask behind. sorry, i don't understand what you mean -mike -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: This is a digitally signed message part. URL: